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* [gcc(refs/users/marxin/heads/stabs-removal)] fix mips
@ 2022-08-25  6:54 Martin Liska
  0 siblings, 0 replies; 2+ messages in thread
From: Martin Liska @ 2022-08-25  6:54 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:b50d44a51455310a597d30be1960fea45751d78d

commit b50d44a51455310a597d30be1960fea45751d78d
Author: Martin Liska <mliska@suse.cz>
Date:   Wed Aug 24 22:31:38 2022 +0200

    fix mips

Diff:
---
 gcc/config/mips/mips.cc | 12 ------------
 gcc/config/mips/mips.h  | 12 ------------
 2 files changed, 24 deletions(-)

diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 78475061a5a..47724950c3e 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -445,7 +445,6 @@ int num_source_filenames;
 const char *current_function_file = "";
 
 /* Arrays that map GCC register numbers to debugger register numbers.  */
-int mips_dbx_regno[FIRST_PSEUDO_REGISTER];
 int mips_dwarf_regno[FIRST_PSEUDO_REGISTER];
 
 /* Information about the current function's epilogue, used only while
@@ -20501,24 +20500,13 @@ mips_option_override (void)
 
   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     {
-      mips_dbx_regno[i] = IGNORED_DWARF_REGNUM;
       if (GP_REG_P (i) || FP_REG_P (i) || ALL_COP_REG_P (i))
 	mips_dwarf_regno[i] = i;
       else
 	mips_dwarf_regno[i] = INVALID_REGNUM;
     }
 
-  start = GP_DBX_FIRST - GP_REG_FIRST;
-  for (i = GP_REG_FIRST; i <= GP_REG_LAST; i++)
-    mips_dbx_regno[i] = i + start;
-
-  start = FP_DBX_FIRST - FP_REG_FIRST;
-  for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)
-    mips_dbx_regno[i] = i + start;
-
   /* Accumulator debug registers use big-endian ordering.  */
-  mips_dbx_regno[HI_REGNUM] = MD_DBX_FIRST + 0;
-  mips_dbx_regno[LO_REGNUM] = MD_DBX_FIRST + 1;
   mips_dwarf_regno[HI_REGNUM] = MD_REG_FIRST + 0;
   mips_dwarf_regno[LO_REGNUM] = MD_REG_FIRST + 1;
   for (i = DSP_ACC_REG_FIRST; i <= DSP_ACC_REG_LAST; i += 2)
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index e839f1bc885..af501d4ff85 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1547,14 +1547,6 @@ FP_ASM_SPEC "\
 #define USER_LABEL_PREFIX	""
 #endif
 
-/* On Sun 4, this limit is 2048.  We use 1500 to be safe,
-   since the length can run past this up to a continuation point.  */
-#undef DBX_CONTIN_LENGTH
-#define DBX_CONTIN_LENGTH 1500
-
-/* How to renumber registers for dbx and gdb.  */
-#define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[REGNO]
-
 /* The mapping from gcc register number to DWARF 2 CFA column number.  */
 #define DWARF_FRAME_REGNUM(REGNO) mips_dwarf_regno[REGNO]
 
@@ -1868,7 +1860,6 @@ FP_ASM_SPEC "\
 #define GP_REG_FIRST 0
 #define GP_REG_LAST  31
 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
-#define GP_DBX_FIRST 0
 #define K0_REG_NUM   (GP_REG_FIRST + 26)
 #define K1_REG_NUM   (GP_REG_FIRST + 27)
 #define KERNEL_REG_P(REGNO)	(IN_RANGE (REGNO, K0_REG_NUM, K1_REG_NUM))
@@ -1876,12 +1867,10 @@ FP_ASM_SPEC "\
 #define FP_REG_FIRST 32
 #define FP_REG_LAST  63
 #define FP_REG_NUM   (FP_REG_LAST - FP_REG_FIRST + 1)
-#define FP_DBX_FIRST 32
 
 #define MD_REG_FIRST 64
 #define MD_REG_LAST  65
 #define MD_REG_NUM   (MD_REG_LAST - MD_REG_FIRST + 1)
-#define MD_DBX_FIRST (FP_DBX_FIRST + FP_REG_NUM)
 
 #define MSA_REG_FIRST FP_REG_FIRST
 #define MSA_REG_LAST  FP_REG_LAST
@@ -3220,7 +3209,6 @@ extern int num_source_filenames;	/* current .file # */
 extern struct mips_asm_switch mips_noreorder;
 extern struct mips_asm_switch mips_nomacro;
 extern struct mips_asm_switch mips_noat;
-extern int mips_dbx_regno[];
 extern int mips_dwarf_regno[];
 extern bool mips_split_p[];
 extern bool mips_split_hi_p[];

^ permalink raw reply	[flat|nested] 2+ messages in thread

* [gcc(refs/users/marxin/heads/stabs-removal)] fix mips
@ 2022-08-25  6:53 Martin Liska
  0 siblings, 0 replies; 2+ messages in thread
From: Martin Liska @ 2022-08-25  6:53 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:6d6676e182a5da21cdf99326dd6adcaea34c9285

commit 6d6676e182a5da21cdf99326dd6adcaea34c9285
Author: Martin Liska <mliska@suse.cz>
Date:   Wed Aug 24 22:31:38 2022 +0200

    fix mips

Diff:
---
 gcc/config/mips/mips.cc | 12 ------------
 gcc/config/mips/mips.h  | 12 ------------
 2 files changed, 24 deletions(-)

diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 78475061a5a..47724950c3e 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -445,7 +445,6 @@ int num_source_filenames;
 const char *current_function_file = "";
 
 /* Arrays that map GCC register numbers to debugger register numbers.  */
-int mips_dbx_regno[FIRST_PSEUDO_REGISTER];
 int mips_dwarf_regno[FIRST_PSEUDO_REGISTER];
 
 /* Information about the current function's epilogue, used only while
@@ -20501,24 +20500,13 @@ mips_option_override (void)
 
   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     {
-      mips_dbx_regno[i] = IGNORED_DWARF_REGNUM;
       if (GP_REG_P (i) || FP_REG_P (i) || ALL_COP_REG_P (i))
 	mips_dwarf_regno[i] = i;
       else
 	mips_dwarf_regno[i] = INVALID_REGNUM;
     }
 
-  start = GP_DBX_FIRST - GP_REG_FIRST;
-  for (i = GP_REG_FIRST; i <= GP_REG_LAST; i++)
-    mips_dbx_regno[i] = i + start;
-
-  start = FP_DBX_FIRST - FP_REG_FIRST;
-  for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)
-    mips_dbx_regno[i] = i + start;
-
   /* Accumulator debug registers use big-endian ordering.  */
-  mips_dbx_regno[HI_REGNUM] = MD_DBX_FIRST + 0;
-  mips_dbx_regno[LO_REGNUM] = MD_DBX_FIRST + 1;
   mips_dwarf_regno[HI_REGNUM] = MD_REG_FIRST + 0;
   mips_dwarf_regno[LO_REGNUM] = MD_REG_FIRST + 1;
   for (i = DSP_ACC_REG_FIRST; i <= DSP_ACC_REG_LAST; i += 2)
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index e839f1bc885..af501d4ff85 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1547,14 +1547,6 @@ FP_ASM_SPEC "\
 #define USER_LABEL_PREFIX	""
 #endif
 
-/* On Sun 4, this limit is 2048.  We use 1500 to be safe,
-   since the length can run past this up to a continuation point.  */
-#undef DBX_CONTIN_LENGTH
-#define DBX_CONTIN_LENGTH 1500
-
-/* How to renumber registers for dbx and gdb.  */
-#define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[REGNO]
-
 /* The mapping from gcc register number to DWARF 2 CFA column number.  */
 #define DWARF_FRAME_REGNUM(REGNO) mips_dwarf_regno[REGNO]
 
@@ -1868,7 +1860,6 @@ FP_ASM_SPEC "\
 #define GP_REG_FIRST 0
 #define GP_REG_LAST  31
 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
-#define GP_DBX_FIRST 0
 #define K0_REG_NUM   (GP_REG_FIRST + 26)
 #define K1_REG_NUM   (GP_REG_FIRST + 27)
 #define KERNEL_REG_P(REGNO)	(IN_RANGE (REGNO, K0_REG_NUM, K1_REG_NUM))
@@ -1876,12 +1867,10 @@ FP_ASM_SPEC "\
 #define FP_REG_FIRST 32
 #define FP_REG_LAST  63
 #define FP_REG_NUM   (FP_REG_LAST - FP_REG_FIRST + 1)
-#define FP_DBX_FIRST 32
 
 #define MD_REG_FIRST 64
 #define MD_REG_LAST  65
 #define MD_REG_NUM   (MD_REG_LAST - MD_REG_FIRST + 1)
-#define MD_DBX_FIRST (FP_DBX_FIRST + FP_REG_NUM)
 
 #define MSA_REG_FIRST FP_REG_FIRST
 #define MSA_REG_LAST  FP_REG_LAST
@@ -3220,7 +3209,6 @@ extern int num_source_filenames;	/* current .file # */
 extern struct mips_asm_switch mips_noreorder;
 extern struct mips_asm_switch mips_nomacro;
 extern struct mips_asm_switch mips_noat;
-extern int mips_dbx_regno[];
 extern int mips_dwarf_regno[];
 extern bool mips_split_p[];
 extern bool mips_split_hi_p[];

^ permalink raw reply	[flat|nested] 2+ messages in thread

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