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* [gcc/devel/rust/master] Remove missed target hooks code
@ 2022-08-29 15:31 Thomas Schwinge
0 siblings, 0 replies; only message in thread
From: Thomas Schwinge @ 2022-08-29 15:31 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a15ee6c3e5d710556d145e6af499b09993c4ee64
commit a15ee6c3e5d710556d145e6af499b09993c4ee64
Author: Philip Herron <philip.herron@embecosm.com>
Date: Tue Aug 23 14:48:25 2022 +0100
Remove missed target hooks code
Diff:
---
gcc/config/aarch64/aarch64-rust.cc | 146 ----------
gcc/config/alpha/alpha-rust.cc | 44 ---
gcc/config/arc/arc-rust.cc | 104 --------
gcc/config/arm/arm-rust.cc | 262 ------------------
gcc/config/c6x/c6x-rust.cc | 55 ----
gcc/config/cr16/cr16-rust.cc | 53 ----
gcc/config/csky/csky-rust.cc | 82 ------
gcc/config/default-rust.cc | 26 --
gcc/config/epiphany/epiphany-rust.cc | 81 ------
gcc/config/frv/frv-rust.cc | 111 --------
gcc/config/i386/i386-rust.cc | 501 -----------------------------------
gcc/config/ia64/ia64-rust.cc | 125 ---------
gcc/config/m68k/m68k-rust.cc | 63 -----
gcc/config/mips/mips-rust.cc | 297 ---------------------
gcc/config/nds32/nds32-rust.cc | 194 --------------
gcc/config/nios2/nios2-rust.cc | 90 -------
gcc/config/nvptx/nvptx-rust.cc | 64 -----
gcc/config/or1k/or1k-rust.cc | 58 ----
gcc/config/pa/pa-rust.cc | 88 ------
gcc/config/pdp11/pdp11-rust.cc | 59 -----
gcc/config/riscv/riscv-rust.cc | 60 -----
gcc/config/rs6000/rs6000-rust.cc | 81 ------
gcc/config/rx/rx-rust.cc | 75 ------
gcc/config/s390/s390-rust.cc | 57 ----
gcc/config/sh/sh-rust.cc | 163 ------------
gcc/config/sparc/sparc-rust.cc | 65 -----
gcc/config/v850/v850-rust.cc | 83 ------
27 files changed, 3087 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-rust.cc b/gcc/config/aarch64/aarch64-rust.cc
deleted file mode 100644
index eb16a98891e..00000000000
--- a/gcc/config/aarch64/aarch64-rust.cc
+++ /dev/null
@@ -1,146 +0,0 @@
-/* Subroutines for the Rust front end on the AArch64 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for AArch64 targets. */
-
-void aarch64_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "aarch64");
-
- // TODO: almost feature-complete with rustc - missing "ras" feature (which is not in gcc)
-
- // features from rustc
- if (TARGET_FLOAT) {
- rust_add_target_info("target_feature", "fp-armv8");
- rust_add_target_info("target_feature", "fp");
- }
- if (TARGET_SIMD)
- rust_add_target_info("target_feature", "neon");
- if (TARGET_SVE)
- rust_add_target_info("target_feature", "sve");
- if (TARGET_CRC32)
- rust_add_target_info("target_feature", "crc");
- if (TARGET_CRYPTO)
- rust_add_target_info("target_feature", "crypto");
- if (TARGET_LSE)
- rust_add_target_info("target_feature", "lse");
- if (AARCH64_ISA_RDMA)
- rust_add_target_info("target_feature", "rdm");
- if (TARGET_FP_F16INST) {
- rust_add_target_info("target_feature", "fullfp16");
- rust_add_target_info("target_feature", "fp16");
- }
- if (aarch64_isa_flags & AARCH64_FL_RCPC)
- rust_add_target_info("target_feature", "rcpc");
- if (TARGET_DOTPROD)
- rust_add_target_info("target_feature", "dotprod");
- if (aarch64_isa_flags & AARCH64_FL_V8_1)
- rust_add_target_info("target_feature", "v8.1a");
- if (AARCH64_ISA_V8_2)
- rust_add_target_info("target_feature", "v8.2a");
- if (AARCH64_ISA_V8_3)
- rust_add_target_info("target_feature", "v8.3a");
-
- // llvm-derived features
- if (TARGET_SM4)
- rust_add_target_info("target_feature", "sm4");
- if (TARGET_SHA2)
- rust_add_target_info("target_feature", "sha2");
- if (TARGET_SHA3)
- rust_add_target_info("target_feature", "sha3");
- if (TARGET_AES)
- rust_add_target_info("target_feature", "aes");
- if (TARGET_F16FML)
- rust_add_target_info("target_feature", "fp16fml");
- if (aarch64_isa_flags & AARCH64_FL_PROFILE)
- rust_add_target_info("target_feature", "spe");
- if (TARGET_SVE2)
- rust_add_target_info("target_feature", "sve2");
- if (aarch64_isa_flags & AARCH64_FL_SVE2_AES)
- rust_add_target_info("target_feature", "sve2-aes");
- if (aarch64_isa_flags & AARCH64_FL_SVE2_SM4)
- rust_add_target_info("target_feature", "sve2-sm4");
- if (aarch64_isa_flags & AARCH64_FL_SVE2_SHA3)
- rust_add_target_info("target_feature", "sve2-sha3");
- if (aarch64_isa_flags & AARCH64_FL_SVE2_BITPERM)
- rust_add_target_info("target_feature", "sve2-bitperm");
- if (TARGET_STRICT_ALIGN)
- rust_add_target_info("target_feature", "strict-align");
- if (flag_mrecip_low_precision_sqrt)
- rust_add_target_info("target_feature", "use-reciprocal-square-root");
- if (TARGET_JSCVT)
- rust_add_target_info("target_feature", "jsconv");
- if (TARGET_COMPLEX)
- rust_add_target_info("target_feature", "complxnum");
- if (AARCH64_ISA_RCPC8_4)
- rust_add_target_info("target_feature", "rcpc-immo");
- if (TARGET_FRINT)
- rust_add_target_info("target_feature", "fptoint");
- if (aarch64_isa_flags & AARCH64_FL_SB)
- rust_add_target_info("target_feature", "sb");
- if (aarch64_isa_flags & AARCH64_FL_SSBS)
- rust_add_target_info("target_feature", "ssbs");
- if (aarch64_isa_flags & AARCH64_FL_PREDRES)
- rust_add_target_info("target_feature", "predres");
- if (aarch64_enable_bti)
- rust_add_target_info("target_feature", "bti");
- if (AARCH64_ISA_RNG)
- rust_add_target_info("target_feature", "rand");
- if (TARGET_MEMTAG)
- rust_add_target_info("target_feature", "mte");
- if (TARGET_TME)
- rust_add_target_info("target_feature", "tme");
- if (AARCH64_ISA_BF16)
- rust_add_target_info("target_feature", "bf16");
- if (AARCH64_ISA_I8MM)
- rust_add_target_info("target_feature", "i8mm");
- if (AARCH64_ISA_F32MM)
- rust_add_target_info("target_feature", "f32mm");
- if (AARCH64_ISA_F64MM)
- rust_add_target_info("target_feature", "f64mm");
- if (AARCH64_ISA_V8_4)
- rust_add_target_info("target_feature", "v8.4a");
- if (AARCH64_ISA_V8_5)
- rust_add_target_info("target_feature", "v8.5a");
- if (AARCH64_ISA_V8_6)
- rust_add_target_info("target_feature", "v8.6a");
-
- /* TODO: find features for pan (Privileged Access-Never), lor (Limited Ordering Regions),
- * vh (Virtual Host), perfmon, pan-rwv (PAN s1e1R and s1e1W variants),
- * uaops (UAO PState), ccpp (Cache Clean to Point of Persistence), zcm (zero-cycle register move),
- * zcz-gp (zero-cycle zeroing for generic regs), zcz-fp (zero-cycle zeroing for FP regs), zcz
- * (both), zcz-fp-workaround, reserve specific registers, make specific registers callee saved,
- * use-aa (alias analysis), balance-fp-ops, predictable-select-expensive, custom-cheap-as-move,
- * exynos-cheap-as-move, use-postra-scheduler, slow-misaligned-128store, slow-paired-128,
- * slow-strqro-store, alternate-sextload-cvt-f32-pattern, arith-bcc-fusion, arith-cbz-fusion,
- * fuse-address, fuse-aes, fuse-arith-logic, fuse-csel, fuse-crypto-eor, fuse-literals,
- * disable-latency-sched-heuristic, force-32bit-jump-tables, pa
- * (Pointer Authentication), ccidx (extend CCSIDR number of sets),
- * nv (Nested Virtualisation), rasv8_4, mpam (Memory system Partitioning and Monitoring),
- * dit (Data Independent Timing), tracev8.4, am (Activity Monitors), amvs (Activity Monitors
- * Virtualisation), sel2 (Secure Exception Level 2), pmu, tlb-rmi (TLB Range and Maintenance), fmi
- * (Flag Manipulation), no-neg-immediates, lsl-fast, aggressive-fma,
- * altnzcv, specrestrict, ccdp, trbe, ete, tagged-globals, fgt, ecv, maybe cpus */
- // gcc supports pointer authentication, but i can only find builtins and no switch for it
-}
diff --git a/gcc/config/alpha/alpha-rust.cc b/gcc/config/alpha/alpha-rust.cc
deleted file mode 100644
index 74a6902a7d2..00000000000
--- a/gcc/config/alpha/alpha-rust.cc
+++ /dev/null
@@ -1,44 +0,0 @@
-/* Subroutines for the Rust front end on the DEC Alpha.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for DEC Alpha targets. */
-
-void
-alpha_rust_target_cpu_info (void)
-{
- /* i couldn't actually confirm that this was the arch name (removed from llvm and no rustc support),
- * but i don't think they would choose something different to gcc */
- rust_add_target_info ("target_arch", "alpha");
-
- // CIX was actually the only llvm option available when it was removed, but adding other gcc ones
- if (TARGET_CIX)
- rust_add_target_info ("target_feature", "cix");
- if (TARGET_FIX)
- rust_add_target_info ("target_feature", "fix");
- if (TARGET_BWX)
- rust_add_target_info ("target_feature", "bwx");
- // may be called "mvi" under rustc (but they have no support for it atm, so who cares amirite?)
- if (TARGET_MAX)
- rust_add_target_info ("target_feature", "max");
-}
diff --git a/gcc/config/arc/arc-rust.cc b/gcc/config/arc/arc-rust.cc
deleted file mode 100644
index c94749f0559..00000000000
--- a/gcc/config/arc/arc-rust.cc
+++ /dev/null
@@ -1,104 +0,0 @@
-/* Subroutines for the Rust front end on the Synopsys DesignWare ARC cpu.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for Synopsys DesignWare ARC targets. */
-
-void
-arc_rust_target_cpu_info (void)
-{
- rust_add_target_info ("target_arch", "arc");
-
- /* in llvm, the arc target has no "subtargets" (features according to rustc) as far as I can tell
- * gcc has a bunch of target macros that look like they could represent features, which I've added
- * provisionally. TODO add and rename features based on llvm. */
- if (TARGET_NORM)
- rust_add_target_info ("target_feature", "norm");
- if (TARGET_OPTFPE)
- rust_add_target_info ("target_feature", "optfpe");
- if (TARGET_SWAP)
- rust_add_target_info ("target_feature", "swap");
-
- if (TARGET_UNALIGN_BRANCH)
- rust_add_target_info ("target_feature", "unalign-branch");
- if (TARGET_PAD_RETURN)
- rust_add_target_info ("target_feature", "pad-return");
- if (TARGET_AT_DBR_CONDEXEC)
- rust_add_target_info ("target_feature", "at-dbr-condexec");
-
- // TODO: maybe define different cpu types?
-
- // TODO: are all these below needed and useful?
- if (TARGET_MPYW)
- rust_add_target_info ("target_feature", "mpyw");
- if (TARGET_MULTI)
- rust_add_target_info ("target_feature", "multi");
- if (TARGET_MPY)
- rust_add_target_info ("target_feature", "mpy");
- if (TARGET_ARC700_MPY)
- rust_add_target_info ("target_feature", "arc700-mpy");
- if (TARGET_ANY_MPY)
- rust_add_target_info ("target_feature", "any-mpy");
- if (TARGET_PLUS_DMPY)
- rust_add_target_info ("target_feature", "plus-dmpy");
- if (TARGET_PLUS_MACD)
- rust_add_target_info ("target_feature", "plus-macd");
- if (TARGET_PLUS_QMACW)
- rust_add_target_info ("target_feature", "plus-qmacw");
- if (TARGET_LP_WR_INTERLOCK)
- rust_add_target_info ("target_feature", "lp-wr-interlock");
-
- // TODO: should different cpu families be removed?
- if (TARGET_ARC600_FAMILY)
- rust_add_target_info ("target_feature", "arc600-family");
- if (TARGET_ARCOMPACT_FAMILY)
- rust_add_target_info ("target_feature", "arcompact-family");
-
- if (TARGET_HARD_FLOAT)
- rust_add_target_info ("target_feature", "hard-float");
- if (TARGET_FP_SP_BASE)
- rust_add_target_info ("target_feature", "fp-sp-base");
- if (TARGET_FP_DP_BASE)
- rust_add_target_info ("target_feature", "fp-dp-base");
- if (TARGET_FP_SP_FUSED)
- rust_add_target_info ("target_feature", "fp-sp-fused");
- if (TARGET_FP_DP_FUSED)
- rust_add_target_info ("target_feature", "fp-dp-fused");
- if (TARGET_FP_SP_CONV)
- rust_add_target_info ("target_feature", "fp-sp-conv");
- if (TARGET_FP_DP_CONV)
- rust_add_target_info ("target_feature", "fp-dp-conv");
- if (TARGET_FP_SP_SQRT)
- rust_add_target_info ("target_feature", "fp-sp-sqrt");
- if (TARGET_FP_DP_SQRT)
- rust_add_target_info ("target_feature", "fp-dp-sqrt");
- if (TARGET_FP_DP_AX)
- rust_add_target_info ("target_feature", "fp-dp-ax");
- if (TARGET_FPX_QUARK)
- rust_add_target_info ("target_feature", "fpx-quark");
- if (TARGET_DBNZ)
- rust_add_target_info ("target_feature", "dbnz");
-
- if (TARGET_BI_BIH)
- rust_add_target_info ("target_feature", "bi-bih");
-}
diff --git a/gcc/config/arm/arm-rust.cc b/gcc/config/arm/arm-rust.cc
deleted file mode 100644
index 0c78ce6e92a..00000000000
--- a/gcc/config/arm/arm-rust.cc
+++ /dev/null
@@ -1,262 +0,0 @@
-/* Subroutines for the Rust front end on the ARM architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for ARM targets. */
-
-void arm_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "arm");
-
- // features stabilised in rustc:
- switch (TARGET_ARM_ARCH_PROFILE) {
- case 'A':
- rust_add_target_info("target_feature", "aclass");
- break;
- case 'R':
- rust_add_target_info("target_feature", "rclass");
- break;
- case 'M':
- rust_add_target_info("target_feature", "mclass");
- break;
- default:
- fprintf(stderr, "Screwed up profile selection in arm-rust.cc - unknown profile '%c'",
- TARGET_ARM_ARCH_PROFILE);
- break;
- }
- if (TARGET_DSP_MULTIPLY)
- rust_add_target_info("target_feature", "dsp");
- if (TARGET_NEON)
- rust_add_target_info("target_feature", "neon");
- if (TARGET_CRC32)
- rust_add_target_info("target_feature", "crc");
- /* TODO: note that sha2 is an option for aarch64 in gcc but not for arm, so no feature here
- * possible. The same goes for aes. However, as llvm has them as prerequisites for crypto, they
- * are enabled with it. */
- if (TARGET_CRYPTO) {
- rust_add_target_info("target_feature", "crypto");
- rust_add_target_info("target_feature", "sha2");
- rust_add_target_info("target_feature", "aes");
- }
- if (arm_arch5te)
- rust_add_target_info("target_feature", "v5te");
- if (arm_arch6)
- rust_add_target_info("target_feature", "v6");
- if (arm_arch6k)
- rust_add_target_info("target_feature", "v6k");
- // as gcc does not appear to consider "v6t2" a proper arch, it is defined when prequisites are met
- bool hasV6T2 = arm_arch6k && arm_arch_thumb2; // TODO: also "v8m baseline" stuff too
- if (hasV6T2)
- rust_add_target_info("target_feature", "v6t2");
- if (arm_arch7)
- rust_add_target_info("target_feature", "v7");
- if (arm_arch8)
- rust_add_target_info("target_feature", "v8");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_vfpv2) && TARGET_VFP_DOUBLE)
- rust_add_target_info("target_feature", "vfp2");
- if (TARGET_VFP3 && TARGET_VFP_DOUBLE && TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp3");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_vfpv4)
- && bitmap_bit_p(arm_active_target.isa, isa_bit_fp16conv) && TARGET_VFP_DOUBLE
- && TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp4");
-
- // llvm features:
- // should be correct option (i.e. thumb mode rather than just thumb-aware) as TARGET_ARM is
- // inverse
- if (TARGET_THUMB)
- rust_add_target_info("target_feature", "thumb-mode");
- if (TARGET_SOFT_FLOAT) {
- rust_add_target_info("target_feature", "soft-float");
- } else {
- // only have fp features if hard float
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_vfp_base))
- rust_add_target_info("target_feature", "fpregs");
- if (TARGET_VFP_DOUBLE) {
- rust_add_target_info("target_feature", "fp64");
- rust_add_target_info("target_feature", "fpregs64");
- }
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "d32");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_vfpv2)) {
- rust_add_target_info("target_feature", "vfp2sp");
-
- if (TARGET_VFP_DOUBLE)
- rust_add_target_info("target_feature", "vfp2");
- }
- if (TARGET_VFP3) {
- rust_add_target_info("target_feature", "vfp3d16sp");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp3sp");
-
- if (TARGET_VFP_DOUBLE) {
- rust_add_target_info("target_feature", "vfp3d16");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp3");
- }
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_fp16conv))
- rust_add_target_info("target_info", "fp16");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_vfpv4)) {
- // should implicitly enable fp16conv as well
- rust_add_target_info("target_feature", "vfp4d16sp");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp4sp");
-
- if (TARGET_VFP_DOUBLE) {
- rust_add_target_info("target_feature", "vfp4d16");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "vfp4");
- }
- }
- // assuming that fp-armv8 is the same as fpv5
- if (TARGET_VFP5) {
- rust_add_target_info("target_feature", "fp-armv8d16sp");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "fp-armv8sp");
-
- if (TARGET_VFP_DOUBLE) {
- rust_add_target_info("target_feature", "fp-armv8d16");
-
- if (TARGET_VFPD32)
- rust_add_target_info("target_feature", "fp-armv8");
- }
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_fp16))
- rust_add_target_info("target_feature", "fullfp16");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_fp16fml))
- rust_add_target_info("target_feature", "fp16fml");
- if (arm_arch_thumb_hwdiv)
- rust_add_target_info("target_feature", "hwdiv");
- if (arm_arch_arm_hwdiv)
- rust_add_target_info("target_feature", "hwdiv-arm");
- }
- // TODO: I'm not sure if there's an exact correlation here (data barrier), so maybe research
- // There's also the question of whether this also means "full data barrier" ("dfb" in llvm)
- if (TARGET_HAVE_MEMORY_BARRIER)
- rust_add_target_info("target_feature", "db");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cmse))
- rust_add_target_info("target_feature", "8msecext");
- if (TARGET_DOTPROD)
- rust_add_target_info("target_feature", "dotprod");
- // TODO: supposedly gcc supports RAS, but I couldn't find the option, so leaving out "ras" for now
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_mp))
- rust_add_target_info("target_feature", "mp");
- // TODO: figure out the exact strict-align feature, which I'm pretty sure GCC has
- // TODO: figure out how to access long call data (which is in GCC) for "long-calls"
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_sb))
- rust_add_target_info("target_feature", "sb");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_bf16))
- rust_add_target_info("target_feature", "bf16");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_i8mm))
- rust_add_target_info("target_feature", "i8mm");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_thumb2))
- rust_add_target_info("target_feature", "thumb2");
- if (arm_arch4t)
- rust_add_target_info("target_feature", "v4t");
- if (arm_arch5t)
- rust_add_target_info("target_feature", "v5t");
- if (arm_arch5te)
- rust_add_target_info("target_feature", "v5te");
- if (arm_arch6m)
- rust_add_target_info("target_feature", "v6m");
- bool hasBaseline8MPreReqs = bitmap_bit_p(arm_active_target.isa, isa_bit_be8)
- && arm_arch_thumb_hwdiv && arm_arch5t && arm_arch4 && arm_arch6
- && arm_arch8 && bitmap_bit_p(arm_active_target.isa, isa_bit_armv5te)
- && arm_arch_cmse && arm_arch_thumb1;
- if (hasBaseline8MPreReqs)
- rust_add_target_info("target_feature", "v8m");
- if (hasBaseline8MPreReqs && arm_arch_thumb2 && arm_arch7)
- rust_add_target_info("target_feature", "v8m.main");
- if (arm_arch8_1)
- rust_add_target_info("target_feature", "v8.1a");
- if (arm_arch8_2)
- rust_add_target_info("target_feature", "v8.2a");
- if (arm_arch8_3)
- rust_add_target_info("target_feature", "v8.3a");
- if (arm_arch8_4)
- rust_add_target_info("target_feature", "v8.4a");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_armv8_1m_main))
- rust_add_target_info("target_feature", "v8.1m.main");
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_mve)
- && bitmap_bit_p(arm_active_target.isa, isa_bit_vfp_base)
- && bitmap_bit_p(arm_active_target.isa, isa_bit_armv7em)) {
- rust_add_target_info("target_feature", "mve");
-
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_fp16)
- && bitmap_bit_p(arm_active_target.isa, isa_bit_mve_float))
- rust_add_target_info("target_feature", "mve.fp");
- }
- // Note: no direct option for "cde" found, but it is implicitly activated via cdecpx, so do it
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp0)) {
- rust_add_target_info("target_feature", "cdecp0");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp1)) {
- rust_add_target_info("target_feature", "cdecp1");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp2)) {
- rust_add_target_info("target_feature", "cdecp2");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp3)) {
- rust_add_target_info("target_feature", "cdecp3");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp4)) {
- rust_add_target_info("target_feature", "cdecp4");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp5)) {
- rust_add_target_info("target_feature", "cdecp5");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp6)) {
- rust_add_target_info("target_feature", "cdecp6");
- rust_add_target_info("target_feature", "cde");
- }
- if (bitmap_bit_p(arm_active_target.isa, isa_bit_cdecp7)) {
- rust_add_target_info("target_feature", "cdecp7");
- rust_add_target_info("target_feature", "cde");
- }
- // TODO: consider doing the processors as target features, but honestly they don't seem to fit
-
- /* TODO: further research support for CLREX (v7clrex), acquire-release (lda/ldaex), slow-fp-brcc
- * (slow FP compare and branch), perfmon, trustzone, fpao, fuse-aes, fuse-literals, read-tp-hard,
- * zcz, prof-unpr, slow-vgetlni32, slow-vdup32, prefer-vmovsr, prefer-ishst, muxed-units,
- * slow-odd-reg, slow-load-D-subreg, wide-stride-vfp, dont-widen-vmovs, splat-vfp-neon,
- * expand-fp-mlx, vmlx-hazards, neon-fpmovs, neonfp (as in using neon for scalar fp), vldn-align,
- * nonpipelined-vfp, slowfpvmlx, slowfpvfmx, vmlx-forwarding, 32bit (prefer 32-bit Thumb),
- * loop-align, mve1beat, mve2beat, mve4beat, avoid-partial-cpsr, cheap-predictable-cpsr,
- * avoid-movs-shop, ret-addr-stack, no-branch-predictor, virtualization, nacl-trap, execute-only,
- * reserve-r9, no-movt, no-neg-immediates, use-misched, disable-postra-scheduler, lob (Low
- * Overhead Branch), noarm - can't find them. */
- // note that apparently v7clrex and perfmon are prerequisites for v7 ops, so could maybe enable
- // them like that
-}
diff --git a/gcc/config/c6x/c6x-rust.cc b/gcc/config/c6x/c6x-rust.cc
deleted file mode 100644
index 31b0dd0f320..00000000000
--- a/gcc/config/c6x/c6x-rust.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Subroutines for the Rust front end on the TI C6X.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for TI C6X targets. */
-
-void c6x_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "tic6x");
-
- // llvm seems to have no support for c6x (nor historical support), so names are made up by me
- // TODO maybe put in sub-arches as features? idk
- if (TARGET_DSBT)
- rust_add_target_info("target_feature", "dsbt");
-
- if (TARGET_INSNS_64)
- rust_add_target_info("target_feature", "c64x");
- if (TARGET_INSNS_64PLUS)
- rust_add_target_info("target_feature", "c64x+");
- if (TARGET_INSNS_67)
- rust_add_target_info("target_feature", "c67x");
- if (TARGET_INSNS_67PLUS)
- rust_add_target_info("target_feature", "c67x+");
-
- if (TARGET_LDDW)
- rust_add_target_info("target_feature", "lddw");
- if (TARGET_STDW)
- rust_add_target_info("target_feature", "stdw");
- if (TARGET_MPY32)
- rust_add_target_info("target_feature", "mpy32");
- if (TARGET_FP)
- rust_add_target_info("target_feature", "fp");
- if (TARGET_FP_EXT)
- rust_add_target_info("target_feature", "fp-ext");
-}
diff --git a/gcc/config/cr16/cr16-rust.cc b/gcc/config/cr16/cr16-rust.cc
deleted file mode 100644
index a999d05e505..00000000000
--- a/gcc/config/cr16/cr16-rust.cc
+++ /dev/null
@@ -1,53 +0,0 @@
-/* Subroutines for the Rust front end on the CR16 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for CR16 targets. */
-
-void cr16_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "cr16");
-
- // llvm seems to have no support for cr16 (nor historical support), so names are made up by me
- // TODO maybe put in sub-arches as features? idk
- if (TARGET_BIT_OPS)
- rust_add_target_info("target_feature", "bit-ops");
- if (TARGET_MAC)
- rust_add_target_info("target_feature", "mac");
- if (TARGET_DEBUG_ADDR)
- rust_add_target_info("target_feature", "debug-addr");
- if (TARGET_INT32)
- rust_add_target_info("target_feature", "int32");
-
- if (CR16_TARGET_DATA_NEAR)
- rust_add_target_info("target_feature", "data-model-near");
- if (CR16_TARGET_DATA_MEDIUM)
- rust_add_target_info("target_feature", "data-model-medium");
- if (CR16_TARGET_DATA_FAR)
- rust_add_target_info("target_feature", "data-model-far");
-
- if (TARGET_CR16C)
- rust_add_target_info("target_feature", "cr16c");
- if (TARGET_CR16CP)
- rust_add_target_info("target_feature", "cr16cplus");
-}
diff --git a/gcc/config/csky/csky-rust.cc b/gcc/config/csky/csky-rust.cc
deleted file mode 100644
index 07999073a85..00000000000
--- a/gcc/config/csky/csky-rust.cc
+++ /dev/null
@@ -1,82 +0,0 @@
-/* Subroutines for the Rust front end for C-SKY targets.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for C-SKY targets. */
-
-void cris_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "csky");
-
- // llvm seems to have no support for sky (nor historical support), so names are made up by me
- // TODO maybe put in sub-arches as features? idk. might be useful in this case
- if (TARGET_HARD_FLOAT)
- rust_add_target_info("target_feature", "hard-float");
- else
- rust_add_target_info("target_feature", "soft-float");
- if (TARGET_DOUBLE_FLOAT)
- rust_add_target_info("target_feature", "double-float");
- if (TARGET_FDIVDU)
- rust_add_target_info("target_feature", "fdivdu");
- if (TARGET_ELRW)
- rust_add_target_info("target_feature", "elrw");
- if (TARGET_ISTACK)
- rust_add_target_info("target_feature", "istack");
- if (TARGET_MP)
- rust_add_target_info("target_feature", "mp");
- if (TARGET_CP)
- rust_add_target_info("target_feature", "cp");
- if (TARGET_CACHE)
- rust_add_target_info("target_feature", "cache");
- if (TARGET_SECURITY)
- rust_add_target_info("target_feature", "security"); // maybe also add define for "mac"?
- if (TARGET_TRUST)
- rust_add_target_info("target_feature", "trust");
- if (TARGET_DSP)
- rust_add_target_info("target_feature", "dsp");
- if (TARGET_EDSP)
- rust_add_target_info("target_feature", "edsp");
- if (TARGET_VDSP)
- rust_add_target_info("target_feature", "vdsp");
- if (TARGET_DIV)
- rust_add_target_info("target_feature", "div");
- if (TARGET_MINI_REGISTERS)
- rust_add_target_info("target_feature", "smart");
- if (TARGET_HIGH_REGISTERS)
- rust_add_target_info("target_feature", "high-registers");
- if (TARGET_ANCHOR)
- rust_add_target_info("target_feature", "anchor");
- if (TARGET_PUSHPOP)
- rust_add_target_info("target_feature", "pushpop");
- if (TARGET_MULTIPLE_STLD)
- rust_add_target_info("target_feature", "multiple-stld"); // maybe also add define for "stm"?
- if (TARGET_CONSTANT_POOL)
- rust_add_target_info("target_feature", "constpool");
- if (TARGET_STACK_SIZE)
- rust_add_target_info("target_feature", "stack-size");
- if (TARGET_LIBCCRT)
- rust_add_target_info("target_feature", "ccrt");
- // maybe have branch cost as target feature? but kind of doesn't really fit as "define"
- if (flag_sched_prolog)
- rust_add_target_info("target_feature", "sched-prolog");
-}
diff --git a/gcc/config/default-rust.cc b/gcc/config/default-rust.cc
deleted file mode 100644
index a2754396e8c..00000000000
--- a/gcc/config/default-rust.cc
+++ /dev/null
@@ -1,26 +0,0 @@
-/* Default Rust language target hooks initializer.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "memmodel.h"
-#include "tm_rust.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/epiphany/epiphany-rust.cc b/gcc/config/epiphany/epiphany-rust.cc
deleted file mode 100644
index 254f14a8d74..00000000000
--- a/gcc/config/epiphany/epiphany-rust.cc
+++ /dev/null
@@ -1,81 +0,0 @@
-/* Subroutines for the Rust front end for the Adapteva Epiphany architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for Adapteva Epiphany targets. */
-
-void epiphany_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "epiphany");
-
- // llvm seems to have no support for sky (nor historical support), so names are made up by me
- // TODO: should the "no" dichotomy be preserved? probably not, but which should be chosen?
- if (TARGET_HALF_REG_FILE)
- rust_add_target_info("target_feature", "half-reg-file");
- if (TARGET_PREFER_SHORT_INSN_REGS)
- rust_add_target_info("target_feature", "prefer-short-insn-regs");
- // TODO: maybe have a "branch-cost" feature? doesn't really fit well with "define-only", though
- if (TARGET_CMOVE)
- rust_add_target_info("target_feature", "cmove");
- // TODO: maybe have a "nops" feature? doesn't really fit well with "define-only", though
- if (TARGET_SOFT_CMPSF)
- rust_add_target_info("target_feature", "soft-cmpsf");
- else
- rust_add_target_info("target_feature", "no-soft-cmpsf");
- // TODO: maybe have a "stack-offset" feature? doesn't really fit well with "define-only", though
- if (TARGET_ROUND_NEAREST)
- rust_add_target_info("target_feature", "round-nearest");
- else
- rust_add_target_info("target_feature", "no-round-nearest");
- if (TARGET_LONG_CALLS)
- rust_add_target_info("target_feature", "long-calls");
- if (TARGET_SHORT_CALLS)
- rust_add_target_info("target_feature", "short-calls");
- if (TARGET_SMALL16)
- rust_add_target_info("target_feature", "small16");
- // TODO: output mfp-mode somehow - "define-only" may work, but idk
- if (TARGET_SPLIT_LOHI)
- rust_add_target_info("target_feature", "split-lohi");
- else
- rust_add_target_info("target_feature", "no-split-lohi");
- if (TARGET_POST_INC)
- rust_add_target_info("target_feature", "postinc");
- else
- rust_add_target_info("target_feature", "no-postinc");
- if (TARGET_POST_MODIFY)
- rust_add_target_info("target_feature", "postmodify");
- else
- rust_add_target_info("target_feature", "no-postmodify");
- if (TARGET_VECT_DOUBLE)
- rust_add_target_info("target_feature", "vect-double");
- else
- rust_add_target_info("target_feature", "no-vect-double");
- // TODO: maybe have a "max-vect-align" feature? doesn't really fit well with "define-only", though
- if (TARGET_SPLIT_VECMOVE_EARLY)
- rust_add_target_info("target_feature", "split-vecmove-early");
- // TODO: maybe a feature about having the -1 register (1reg)?
- if (TARGET_FP_IARITH)
- rust_add_target_info("target_feature", "fp-iarith");
- if (TARGET_MAY_ROUND_FOR_TRUNC)
- rust_add_target_info("target_feature", "may-round-for-trunc");
-}
diff --git a/gcc/config/frv/frv-rust.cc b/gcc/config/frv/frv-rust.cc
deleted file mode 100644
index 775481b86a3..00000000000
--- a/gcc/config/frv/frv-rust.cc
+++ /dev/null
@@ -1,111 +0,0 @@
-/* Subroutines for the Rust front end for the FRV architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for FRV targets. */
-
-void frv_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "frv");
-
- // llvm seems to have no support for sky (nor historical support), so names are made up by me
- // TODO maybe put in sub-arches as features? idk. might be useful in this case
- if (TARGET_ACC_4)
- rust_add_target_info("target_feature", "acc-4");
- if (TARGET_ACC_8)
- rust_add_target_info("target_feature", "acc-8");
- if (TARGET_ALIGN_LABELS)
- rust_add_target_info("target_feature", "align-labels");
- if (TARGET_ALLOC_CC)
- rust_add_target_info("target_feature", "alloc-cc");
- // TODO: maybe option on branch cost, but wouldn't work well as "define only" option
- if (TARGET_COND_EXEC)
- rust_add_target_info("target_feature", "cond-exec");
- /* TODO: maybe option on cond-exec-insns, but wouldn't work well as "define-only" option.
- * also cond-exec-temps, sched-lookahead */
- if (TARGET_COND_MOVE)
- rust_add_target_info("target_feature", "cond-move");
- if (TARGET_DEBUG)
- rust_add_target_info("target_feature", "debug");
- if (TARGET_DEBUG_ARG)
- rust_add_target_info("target_feature", "debug-arg");
- if (TARGET_DEBUG_ADDR)
- rust_add_target_info("target_feature", "debug-addr");
- if (TARGET_DEBUG_COND_EXEC)
- rust_add_target_info("target_feature", "debug-cond-exec");
- if (TARGET_DEBUG_LOC)
- rust_add_target_info("target_feature", "debug-loc");
- if (TARGET_DEBUG_STACK)
- rust_add_target_info("target_feature", "debug-stack");
- if (TARGET_DOUBLE)
- rust_add_target_info("target_feature", "double");
- if (TARGET_DWORD)
- rust_add_target_info("target_feature", "dword");
- if (TARGET_FDPIC)
- rust_add_target_info("target_feature", "fdpic");
- if (TARGET_FIXED_CC)
- rust_add_target_info("target_feature", "fixed-cc");
- if (TARGET_FPR_32)
- rust_add_target_info("target_feature", "fpr-32");
- if (TARGET_FPR_64)
- rust_add_target_info("target_feature", "fpr-64");
- if (TARGET_GPR_32)
- rust_add_target_info("target_feature", "gpr-32");
- if (TARGET_GPR_64)
- rust_add_target_info("target_feature", "gpr-64");
- if (TARGET_GPREL_RO)
- rust_add_target_info("target_feature", "gprel-ro");
- if (TARGET_HARD_FLOAT)
- rust_add_target_info("target_feature", "hard-float");
- else
- rust_add_target_info("target_feature", "soft-float");
- if (TARGET_INLINE_PLT)
- rust_add_target_info("target_feature", "inline-plt");
- if (TARGET_LIBPIC)
- rust_add_target_info("target_feature", "library-pic");
- if (TARGET_LINKED_FP)
- rust_add_target_info("target_feature", "linked-fp");
- if (TARGET_LONG_CALLS)
- rust_add_target_info("target_feature", "long-calls");
- if (TARGET_MEDIA)
- rust_add_target_info("target_feature", "media");
- if (TARGET_MULADD)
- rust_add_target_info("target_feature", "muladd");
- if (TARGET_MULTI_CE)
- rust_add_target_info("target_feature", "multi-cond-exec");
- if (TARGET_NESTED_CE)
- rust_add_target_info("target_feature", "nested-cond-exec");
- // TODO: maybe something with no-eflags if possible? tomcat-stats? multilib-library-pic?
- if (TARGET_OPTIMIZE_MEMBAR)
- rust_add_target_info("target_feature", "optimize-membar");
- if (TARGET_PACK)
- rust_add_target_info("target_feature", "pack");
- if (TARGET_SCC)
- rust_add_target_info("target_feature", "scc");
- if (TARGET_BIG_TLS)
- rust_add_target_info("target_feature", "large-tls");
- else
- rust_add_target_info("target_feature", "small-tls");
- if (TARGET_VLIW_BRANCH)
- rust_add_target_info("target_feature", "vliw-branch");
-}
diff --git a/gcc/config/i386/i386-rust.cc b/gcc/config/i386/i386-rust.cc
deleted file mode 100644
index 1441a63f32c..00000000000
--- a/gcc/config/i386/i386-rust.cc
+++ /dev/null
@@ -1,501 +0,0 @@
-/* Subroutines for the Rust front end on the x86 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for x86 targets. */
-
-void
-ix86_rust_target_cpu_info (void)
-{
- if (TARGET_64BIT) {
- rust_add_target_info("target_arch", "x86_64");
-
- if (TARGET_X32) {
- // this means it uses 32-bit pointers with 64-bit, basically (ILP32)
- //rust_add_target_info("target_pointer_width", "32");
- // TODO: may also change x86_64-...-linux-gnu to x86_64-...-linux-gnux32
-
- // is this better than just putting in pointer width outside of if statement?
-
- /* TODO: compared to base linux, may also need to change max_atomic_width to 64, add "-mx32"
- * to pre-link args, make stack_probes true, make has_elf_tls false, make needs_plt true.
- * Also, still target_endian is "little", target_c_int_width is "32", maybe steal data layout
- * later from rustc spec, target_os is "linux", target_env is "gnu", target_vendor is "unknown"
- * There is no rustc support for non-gnu/linux targets with ILP32. */
- }
- } else {
- rust_add_target_info("target_arch", "x86");
- }
-
- // features officially "stabilised" in rustc
- if (TARGET_MMX)
- rust_add_target_info("target_feature", "mmx");
- if (TARGET_SSE)
- rust_add_target_info("target_feature", "sse");
- if (TARGET_SSE2)
- rust_add_target_info("target_feature", "sse2");
- if (TARGET_SSE3)
- rust_add_target_info("target_feature", "sse3");
- if (TARGET_SSSE3)
- rust_add_target_info("target_feature", "ssse3");
- if (TARGET_SSE4_1)
- rust_add_target_info("target_feature", "sse4.1");
- if (TARGET_SSE4_2)
- rust_add_target_info("target_feature", "sse4.2");
- if (TARGET_AES)
- rust_add_target_info("target_feature", "aes");
- if (TARGET_SHA)
- rust_add_target_info("target_feature", "sha");
- if (TARGET_AVX)
- rust_add_target_info("target_feature", "avx");
- if (TARGET_AVX2)
- rust_add_target_info("target_feature", "avx2");
- if (TARGET_AVX512F)
- rust_add_target_info("target_feature", "avx512f");
- if (TARGET_AVX512ER)
- rust_add_target_info("target_feature", "avx512er");
- if (TARGET_AVX512CD)
- rust_add_target_info("target_feature", "avx512cd");
- if (TARGET_AVX512PF)
- rust_add_target_info("target_feature", "avx512pf");
- if (TARGET_AVX512DQ)
- rust_add_target_info("target_feature", "avx512dq");
- if (TARGET_AVX512BW)
- rust_add_target_info("target_feature", "avx512bw");
- if (TARGET_AVX512VL)
- rust_add_target_info("target_feature", "avx512vl");
- if (TARGET_AVX512VBMI)
- rust_add_target_info("target_feature", "avx512vbmi");
- if (TARGET_AVX512IFMA)
- rust_add_target_info("target_feature", "avx512ifma");
- if (TARGET_AVX512VPOPCNTDQ)
- rust_add_target_info("target_feature", "avx512vpopcntdq");
- if (TARGET_FMA)
- rust_add_target_info("target_feature", "fma");
- if (TARGET_RTM)
- rust_add_target_info("target_feature", "rtm");
- if (TARGET_SSE4A)
- rust_add_target_info("target_feature", "sse4a");
- if (TARGET_BMI) {
- rust_add_target_info("target_feature", "bmi1");
- rust_add_target_info("target_feature", "bmi");
- }
- if (TARGET_BMI2)
- rust_add_target_info("target_feature", "bmi2");
- if (TARGET_LZCNT)
- rust_add_target_info("target_feature", "lzcnt");
- if (TARGET_TBM)
- rust_add_target_info("target_feature", "tbm");
- if (TARGET_POPCNT)
- rust_add_target_info("target_feature", "popcnt");
- if (TARGET_RDRND) {
- rust_add_target_info("target_feature", "rdrand");
- rust_add_target_info("target_feature", "rdrnd");
- }
- if (TARGET_F16C)
- rust_add_target_info("target_feature", "f16c");
- if (TARGET_RDSEED)
- rust_add_target_info("target_feature", "rdseed");
- if (TARGET_ADX)
- rust_add_target_info("target_feature", "adx");
- if (TARGET_FXSR)
- rust_add_target_info("target_feature", "fxsr");
- if (TARGET_XSAVE)
- rust_add_target_info("target_feature", "xsave");
- if (TARGET_XSAVEOPT)
- rust_add_target_info("target_feature", "xsaveopt");
- if (TARGET_XSAVEC)
- rust_add_target_info("target_feature", "xsavec");
- if (TARGET_XSAVES)
- rust_add_target_info("target_feature", "xsaves");
- if (TARGET_VPCLMULQDQ) {
- rust_add_target_info("target_feature", "pclmulqdq");
- rust_add_target_info("target_feature", "vpclmulqdq");
- }
- if (TARGET_CMPXCHG16B)
- rust_add_target_info("target_feature", "cmpxchg16b");
- if (TARGET_MOVBE)
- rust_add_target_info("target_feature", "movbe");
-
- // features derived from llvm not yet in rustc:
- if (TARGET_64BIT)
- rust_add_target_info("target_feature", "64bit-mode");
- else if (TARGET_CODE16)
- rust_add_target_info("target_feature", "16bit-mode");
- else
- rust_add_target_info("target_feature", "32bit-mode");
-
- // TODO: assuming that the TARGET_80387 (which seems to mean "hard float") is also required for x87
- if (TARGET_80387 && (ix86_fpmath & FPMATH_387) != 0)
- rust_add_target_info("target_feature", "x87");
-
- // nopl: hard-coded (as gcc doesn't technically have feature) to return true for cpu arches with it
- // maybe refactor into switch if multiple options
- bool hasNOPL = ix86_arch == PROCESSOR_PENTIUMPRO || ix86_arch == PROCESSOR_PENTIUM4
- || ix86_arch == PROCESSOR_NOCONA || ix86_arch == PROCESSOR_CORE2 || ix86_arch == PROCESSOR_NEHALEM
- || ix86_arch == PROCESSOR_BONNELL || ix86_arch == PROCESSOR_SILVERMONT
- || ix86_arch == PROCESSOR_GOLDMONT || ix86_arch == PROCESSOR_GOLDMONT_PLUS
- || ix86_arch == PROCESSOR_TREMONT || ix86_arch == PROCESSOR_SANDYBRIDGE
- || ix86_arch == PROCESSOR_HASWELL || ix86_arch == PROCESSOR_SKYLAKE
- || ix86_arch == PROCESSOR_SKYLAKE_AVX512 || ix86_arch == PROCESSOR_CANNONLAKE
- || ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_COOPERLAKE
- || ix86_arch == PROCESSOR_ICELAKE_CLIENT || ix86_arch == PROCESSOR_ICELAKE_SERVER
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM
- || ix86_arch == PROCESSOR_AMDFAM10 || ix86_arch == PROCESSOR_BTVER1 || ix86_arch == PROCESSOR_BTVER2
- || ix86_arch == PROCESSOR_BDVER1 || ix86_arch == PROCESSOR_BDVER2 || ix86_arch == PROCESSOR_BDVER3
- || ix86_arch == PROCESSOR_BDVER4 || ix86_arch == PROCESSOR_ZNVER1 || ix86_arch == PROCESSOR_ZNVER2
- || ix86_arch == PROCESSOR_ATHLON || ix86_arch == PROCESSOR_K8;
- // this list should be exhaustive
- if (hasNOPL)
- rust_add_target_info("target_feature", "nopl");
- if (TARGET_CMOVE)
- rust_add_target_info("target_feature", "cmov");
- if (TARGET_CMPXCHG8B)
- rust_add_target_info("target_feature", "cx8");
- if (TARGET_3DNOW)
- rust_add_target_info("target_feature", "3dnow");
- if (TARGET_3DNOW_A)
- rust_add_target_info("target_feature", "3dnowa");
- if (TARGET_64BIT)
- rust_add_target_info("target_feature", "64bit");
- if (TARGET_CMPXCHG16B)
- rust_add_target_info("target_feature", "cx16");
-
- bool hasSlowSHLD = ix86_arch == PROCESSOR_AMDFAM10 || ix86_arch == PROCESSOR_BTVER1
- || ix86_arch == PROCESSOR_BTVER2 || ix86_arch == PROCESSOR_BDVER1 || ix86_arch == PROCESSOR_BDVER2
- || ix86_arch == PROCESSOR_BDVER3 || ix86_arch == PROCESSOR_BDVER4 || ix86_arch == PROCESSOR_ZNVER1
- || ix86_arch == PROCESSOR_ZNVER2 || ix86_arch == PROCESSOR_ATHLON || ix86_arch == PROCESSOR_K8;
- // TODO: this is not ideal as it marks the baseline x86-64 CPU as having it - only AMD ones do
- if (hasSlowSHLD)
- rust_add_target_info("target_feature", "slow-shld");
- if (ix86_arch == PROCESSOR_SILVERMONT)
- rust_add_target_info("target_feature", "slow-pmulld");
- if (ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM)
- rust_add_target_info("target_feature", "slow-pmaddwd");
-
- bool hasSlowUnaligned16 = ix86_arch == PROCESSOR_BONNELL || ix86_arch == PROCESSOR_GENERIC
- || ix86_arch == PROCESSOR_I386 || ix86_arch == PROCESSOR_I486 || ix86_arch == PROCESSOR_PENTIUM
- || ix86_arch == PROCESSOR_PENTIUMPRO || ix86_arch == PROCESSOR_PENTIUM4
- || ix86_arch == PROCESSOR_NOCONA || ix86_arch == PROCESSOR_CORE2 || ix86_arch == PROCESSOR_K6
- || ix86_arch == PROCESSOR_ATHLON || ix86_arch == PROCESSOR_K8 || ix86_arch == PROCESSOR_GEODE;
- if (hasSlowUnaligned16)
- rust_add_target_info("target_feature", "slow-unaligned-mem-16");
- if (ix86_arch == PROCESSOR_SANDYBRIDGE)
- rust_add_target_info("target_feature", "slow-unaligned-mem-32");
- if (TARGET_PREFETCHWT1)
- rust_add_target_info("target_feature", "prefetchwt1");
- if (TARGET_AVX512VBMI2)
- rust_add_target_info("target_feature", "avx512vbmi2");
- if (TARGET_PKU)
- rust_add_target_info("target_feature", "pku");
- if (TARGET_AVX512VNNI)
- rust_add_target_info("target_feature", "avx512vnni");
- if (TARGET_AVX512BF16)
- rust_add_target_info("target_feature", "avx512bf16");
- if (TARGET_AVX512BITALG)
- rust_add_target_info("target_feature", "avx512bitalg");
- if (TARGET_AVX512VP2INTERSECT)
- rust_add_target_info("target_feature", "avx512vp2intersect");
- if (TARGET_PCLMUL)
- rust_add_target_info("target_feature", "pclmul");
- if (TARGET_GFNI)
- rust_add_target_info("target_feature", "gfni");
- if (TARGET_FMA4)
- rust_add_target_info("target_feature", "fma4");
- if (TARGET_XOP)
- rust_add_target_info("target_feature", "xop");
-
- // this is only enabled by choice in llvm, never by default - TODO determine if gcc enables it
- // rust_add_target_info("target_feature", "sse-unaligned-mem");
-
- if (TARGET_VAES)
- rust_add_target_info("target_feature", "vaes");
- if (TARGET_LWP)
- rust_add_target_info("target_feature", "lwp");
- if (TARGET_FSGSBASE)
- rust_add_target_info("target_feature", "fsgsbase");
- if (TARGET_SHSTK)
- rust_add_target_info("target_feature", "shstk");
- if (TARGET_PRFCHW)
- rust_add_target_info("target_feature", "prfchw");
- if (TARGET_SAHF) // would this be better as TARGET_USE_SAHF?
- rust_add_target_info("target_feature", "sahf");
- if (TARGET_MWAITX)
- rust_add_target_info("target_feature", "mwaitx");
- if (TARGET_CLZERO)
- rust_add_target_info("target_feature", "clzero");
- if (TARGET_CLDEMOTE)
- rust_add_target_info("target_feature", "cldemote");
- if (TARGET_PTWRITE)
- rust_add_target_info("target_feature", "ptwrite");
- // TODO: add amx-tile, amx-int8, amx-bf16 features when gcc supports them
-
- // TODO: can't find any gcc option relating to using LEA for adjusting stack pointer, so hardcoding
- if (ix86_arch == PROCESSOR_BONNELL)
- rust_add_target_info("target_feature", "lea-sp");
-
- // TODO: confirm that this is what it actually refers to
- if (TARGET_USE_8BIT_IDIV)
- rust_add_target_info("target_feature", "idivl-to-divb");
-
- /* TODO: can't find any gcc option corresponding to idivq-to-divl - does gcc perform this optimisation?
- * if so, add that feature (use 32-bit divide for positive values less than 2^32) */
- /* bool llvmHasSlowDivide64 = ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE
- || ix86_arch == PROCESSOR_BONNELL || ix86_arch == PROCESSOR_SILVERMONT || ix86_arch == PROCESSOR_KNL
- || ix86_arch == PROCESSOR_KNM || ix86_arch == PROCESSOR_K8;*/
-
- if (TARGET_PAD_SHORT_FUNCTION)
- rust_add_target_info("target_feature", "pad-short-functions");
-
- // TODO: gcc seems to not record whether INVPCID exists, so basing it on llvm
- bool hasINVPCID = ix86_arch == PROCESSOR_HASWELL || ix86_arch == PROCESSOR_SKYLAKE
- || ix86_arch == PROCESSOR_SKYLAKE_AVX512 || ix86_arch == PROCESSOR_CANNONLAKE
- || ix86_arch == PROCESSOR_ICELAKE_CLIENT || ix86_arch == PROCESSOR_ICELAKE_SERVER
- || ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_TIGERLAKE
- || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasINVPCID)
- rust_add_target_info("target_feature", "invpcid");
- if (TARGET_SGX)
- rust_add_target_info("target_feature", "sgx");
- if (TARGET_CLFLUSHOPT)
- rust_add_target_info("target_feature", "clflushopt");
- if (TARGET_CLWB)
- rust_add_target_info("target_feature", "clwb");
- if (TARGET_WBNOINVD)
- rust_add_target_info("target_feature", "wbnoinvd");
- if (TARGET_RDPID)
- rust_add_target_info("target_feature", "rdpid");
- if (TARGET_WAITPKG)
- rust_add_target_info("target_feature", "waitpkg");
- if (TARGET_ENQCMD)
- rust_add_target_info("target_feature", "enqcmd");
-
- // these are only enabled by choice in llvm, never by default - TODO determine if gcc supports them
- // rust_add_target_info("target_feature", "serialize");
- // rust_add_target_info("target_feature", "tsxldtrk");
-
- // TODO: gcc seems to not record whether to avoid memory operanded instructions, so basing it on llvm
- bool hasSlowTwoMemOps = ix86_arch == PROCESSOR_BONNELL || ix86_arch == PROCESSOR_SILVERMONT
- || ix86_arch == PROCESSOR_GOLDMONT || ix86_arch == PROCESSOR_GOLDMONT_PLUS
- || ix86_arch == PROCESSOR_TREMONT || ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM;
- if (hasSlowTwoMemOps)
- rust_add_target_info("target_feature", "slow-two-mem-ops");
-
- // TODO: gcc seems to not record whether LEA needs input at AG stage, so basing it on llvm
- // TODO: maybe something to do with X86_TUNE_OPT_AGU?
- if (ix86_arch == PROCESSOR_BONNELL)
- rust_add_target_info("target_feature", "lea-uses-ag");
-
- // TODO: gcc seems to not record whether LEA with certain arguments is slow, so basing it on llvm
- // TODO: maybe TARGET_AVOID_LEA_FOR_ADDR has something to do with it?
- bool hasSlowLEA = ix86_arch == PROCESSOR_SILVERMONT || ix86_arch == PROCESSOR_GOLDMONT
- || ix86_arch == PROCESSOR_GOLDMONT_PLUS || ix86_arch == PROCESSOR_TREMONT;
- if (hasSlowLEA)
- rust_add_target_info("target_feature", "slow-lea");
-
- // TODO: gcc seems to not record whether LEA with 3 ops or certain regs is slow, so basing it on llvm
- // TODO: maybe TARGET_AVOID_LEA_FOR_ADDR has something to do with it?
- bool hasSlow3OpsLEA = ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE
- || ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM || ix86_arch == PROCESSOR_K8;
- if (hasSlow3OpsLEA)
- rust_add_target_info("target_feature", "slow-3ops-lea");
-
- // TODO: assuming that this is equivalent option - it strictly doesn't cover same cpus
- if (!TARGET_USE_INCDEC)
- rust_add_target_info("target_feature", "slow-incdec");
- // TODO: assuming that this mask actually refers to "hard float" and not x87 specifically
- if (!TARGET_80387)
- rust_add_target_info("target_feature", "soft-float");
-
- // TODO: gcc seems to not record if LZCNT/TZCNT has false deps on dest register, so basing it on llvm
- if (ix86_arch == PROCESSOR_HASWELL)
- rust_add_target_info("target_feature", "false-deps-lzcnt-tzcnt");
-
- if (TARGET_PCONFIG)
- rust_add_target_info("target_feature", "pconfig");
-
- // TODO: gcc seems to not record if variable-mask shuffles are fast, so basing it on llvm
- bool hasFastVariableShuffle = ix86_arch == PROCESSOR_HASWELL || ix86_arch == PROCESSOR_SKYLAKE
- || ix86_arch == PROCESSOR_SKYLAKE_AVX512 || ix86_arch == PROCESSOR_CANNONLAKE
- || ix86_arch == PROCESSOR_ICELAKE_CLIENT || ix86_arch == PROCESSOR_ICELAKE_SERVER
- || ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_TIGERLAKE
- || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasFastVariableShuffle)
- rust_add_target_info("target_feature", "fast-variable-shuffle");
-
- // TODO: ensure that this actually refers to the right thing - difference in gcc and llvm description
- if (TARGET_VZEROUPPER)
- rust_add_target_info("target_feature", "vzeroupper");
-
- // option based on llvm arch analysis as gcc tuning costs seem to indicate a different result
- bool hasFastScalarFSQRT = ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasFastScalarFSQRT)
- rust_add_target_info("target_feature", "fast-scalar-fsqrt");
-
- // option also based on llvm arch analysis
- bool hasFastVectorFSQRT = ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasFastVectorFSQRT)
- rust_add_target_info("target_feature", "fast-vector-fsqrt");
-
- bool hasFastLZCNT = ix86_arch == PROCESSOR_BTVER2 || ix86_arch == PROCESSOR_ZNVER1
- || ix86_arch == PROCESSOR_ZNVER2;
- if (hasFastLZCNT)
- rust_add_target_info("target_feature", "fast-lzcnt");
-
- if (ix86_arch == PROCESSOR_SILVERMONT)
- rust_add_target_info("target_feature", "fast-7bytenop");
-
- bool hasFast11ByteNOP = ix86_arch == PROCESSOR_BDVER1 || ix86_arch == PROCESSOR_BDVER2
- || ix86_arch == PROCESSOR_BDVER3 || ix86_arch == PROCESSOR_BDVER4;
- if (hasFast11ByteNOP)
- rust_add_target_info("target_feature", "fast-11bytenop");
-
- bool hasFast15ByteNOP = ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE
- || ix86_arch == PROCESSOR_BTVER1 || ix86_arch == PROCESSOR_BTVER2
- || ix86_arch == PROCESSOR_ZNVER1 || ix86_arch == PROCESSOR_ZNVER2;
- if (hasFast15ByteNOP)
- rust_add_target_info("target_feature", "fast-15bytenop");
-
- bool hasFastSHLDRotate = ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasFastSHLDRotate)
- rust_add_target_info("target_feature", "fast-shld-rotate");
-
- bool hasERMSB = ix86_arch == PROCESSOR_HASWELL || ix86_arch == PROCESSOR_SKYLAKE
- || ix86_arch == PROCESSOR_SKYLAKE_AVX512 || ix86_arch == PROCESSOR_CANNONLAKE
- || ix86_arch == PROCESSOR_ICELAKE_CLIENT || ix86_arch == PROCESSOR_ICELAKE_SERVER
- || ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_TIGERLAKE
- || ix86_arch == PROCESSOR_COOPERLAKE;
- if (hasERMSB)
- rust_add_target_info("target_feature", "ermsbd");
-
- // TODO: may exist in gcc as tune macros, but not sure, so based on llvm arches
- bool hasBranchFusion = ix86_arch == PROCESSOR_BDVER1 || ix86_arch == PROCESSOR_BDVER2
- || ix86_arch == PROCESSOR_BDVER3 || ix86_arch == PROCESSOR_BDVER4 || ix86_arch == PROCESSOR_ZNVER1
- || ix86_arch == PROCESSOR_ZNVER2;
- if (hasBranchFusion)
- rust_add_target_info("target_feature", "branchfusion");
-
- // TODO: again, may exist as tune macros, but again based on llvm arches
- bool hasMacroFusion = ix86_arch == PROCESSOR_CORE2 || ix86_arch == PROCESSOR_NEHALEM
- || ix86_arch == PROCESSOR_SANDYBRIDGE || ix86_arch == PROCESSOR_HASWELL
- || ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_CASCADELAKE
- || ix86_arch == PROCESSOR_TIGERLAKE || ix86_arch == PROCESSOR_COOPERLAKE || ix86_arch == PROCESSOR_K8;
- if (hasMacroFusion)
- rust_add_target_info("target_feature", "macrofusion");
-
- // TODO: is this equivalent to TARGET_USE_GATHER?
- bool hasFastGather = ix86_arch == PROCESSOR_SKYLAKE || ix86_arch == PROCESSOR_SKYLAKE_AVX512
- || ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_COOPERLAKE
- || ix86_arch == PROCESSOR_CANNONLAKE || ix86_arch == PROCESSOR_ICELAKE_CLIENT
- || ix86_arch == PROCESSOR_ICELAKE_SERVER || ix86_arch == PROCESSOR_TIGERLAKE
- || ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM;
- if (hasFastGather)
- rust_add_target_info("target_feature", "fast-gather");
-
- if (TARGET_PREFER_AVX128)
- rust_add_target_info("target_feature", "prefer-128-bit");
- if (TARGET_PREFER_AVX256)
- rust_add_target_info("target_feature", "prefer-256-bit");
-
- bool preferMaskRegisters = ix86_arch == PROCESSOR_KNL || ix86_arch == PROCESSOR_KNM;
- if (preferMaskRegisters)
- rust_add_target_info("target_feature", "prefer-mask-registers");
-
- /* TODO: add retpoline-indirect-calls, retpoline-indirect-branches, retpoline, retpoline-external-thunk,
- * lvi-cfi (LVI control flow integrity), seses (speculative execution side-effect suppression)
- * lvi-load-hardening if gcc gets support */
-
- if (TARGET_MOVDIRI)
- rust_add_target_info("target_feature", "movdiri");
- if (TARGET_MOVDIR64B)
- rust_add_target_info("target_feature", "movdir64b");
-
- bool hasFastBEXTR = ix86_arch == PROCESSOR_BTVER2 || ix86_arch == PROCESSOR_BDVER2
- || ix86_arch == PROCESSOR_BDVER3 || ix86_arch == PROCESSOR_BDVER4 || ix86_arch == PROCESSOR_ZNVER1
- || ix86_arch == PROCESSOR_ZNVER2;
- if (hasFastBEXTR)
- rust_add_target_info("target_feature", "fast-bextr");
-
- if (ix86_arch == PROCESSOR_BTVER2)
- rust_add_target_info("target_feature", "fast-hops");
-
- bool hasFastScalarShiftMasks = ix86_arch == PROCESSOR_AMDFAM10 || ix86_arch == PROCESSOR_BTVER1
- || ix86_arch == PROCESSOR_BTVER2 || ix86_arch == PROCESSOR_BDVER1 || ix86_arch == PROCESSOR_BDVER2
- || ix86_arch == PROCESSOR_BDVER3 || ix86_arch == PROCESSOR_BDVER4 || ix86_arch == PROCESSOR_ZNVER1
- || ix86_arch == PROCESSOR_ZNVER2 || ix86_arch == PROCESSOR_K8;
- if (hasFastScalarShiftMasks)
- rust_add_target_info("target_feature", "fast-scalar-shift-masks");
-
- bool hasFastVectorShiftMasks = ix86_arch == PROCESSOR_BTVER1 || ix86_arch == PROCESSOR_BTVER2;
- if (hasFastVectorShiftMasks)
- rust_add_target_info("target_feature", "fast-vector-shift-masks");
-
- bool useGoldmontDivSqrtCosts = ix86_arch == PROCESSOR_GOLDMONT || ix86_arch == PROCESSOR_GOLDMONT_PLUS
- || ix86_arch == PROCESSOR_TREMONT;
- if (useGoldmontDivSqrtCosts)
- rust_add_target_info("target_feature", "use-glm-div-sqrt-costs");
-
- // TODO: determine if gcc supports alias analysis (in which case "use-aa" is defined)
-
- // features not supported by llvm but important enough for c frontend to define macros for
- /*if (TARGET_AVX5124VNNIW)
- rust_add_target_info("target_feature", "avx5124vnniw");
- if (TARGET_AVX5124FMAPS)
- rust_add_target_info("target_feature", "avx5124fmaps");
- if (TARGET_ABM)
- rust_add_target_info("target_feature", "abm");
- if ((ix86_fpmath & FPMATH_SSE) && TARGET_SSE)
- ; //def_or_undef (parse_in, "__SSE_MATH__");
- if ((ix86_fpmath & FPMATH_SSE) && TARGET_SSE2)
- ; //def_or_undef (parse_in, "__SSE2_MATH__");
- if (TARGET_MMX_WITH_SSE)
- ; //def_or_undef (parse_in, "__MMX_WITH_SSE__");
- if (TARGET_IAMCU)
- rust_add_target_info("target_feature", "iamcu");*/
-}
diff --git a/gcc/config/ia64/ia64-rust.cc b/gcc/config/ia64/ia64-rust.cc
deleted file mode 100644
index b1ee77aabc4..00000000000
--- a/gcc/config/ia64/ia64-rust.cc
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Subroutines for the Rust front end for the IA-64 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for IA-64 targets. */
-
-void ia64_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "ia64");
-
- // llvm does not appear to have defined features at any point for IA-64, so I made up names
- // TODO: should sub-arches be defined here?
- if (TARGET_GNU_AS)
- rust_add_target_info("target_feature", "gnu-as");
- if (TARGET_GNU_LD)
- rust_add_target_info("target_feature", "gnu-ld");
- if (TARGET_VOL_ASM_STOP)
- rust_add_target_info("target_feature", "volatile-asm-stop");
- if (TARGET_REG_NAMES)
- rust_add_target_info("target_feature", "register-names");
- if (TARGET_NO_SDATA)
- rust_add_target_info("target_feature", "no-sdata");
- else
- rust_add_target_info("target_feature", "sdata");
- if (TARGET_NO_PIC)
- rust_add_target_info("target_feature", "no-pic");
- if (TARGET_CONST_GP)
- rust_add_target_info("target_feature", "constant-gp");
- if (TARGET_AUTO_PIC)
- rust_add_target_info("target_feature", "auto-pic");
-
- switch (TARGET_INLINE_FLOAT_DIV) {
- case 0:
- rust_add_target_info("target_feature", "no-inline-float-divide");
- break;
- case 1:
- rust_add_target_info("target_feature", "inline-float-divide-min-latency");
- break;
- case 2:
- rust_add_target_info("target_feature", "inline-float-divide-max-throughput");
- break;
- default: // TODO: is this an error? should this be an error?
- break;
- }
- switch (TARGET_INLINE_INT_DIV) {
- case 0:
- rust_add_target_info("target_feature", "no-inline-int-divide");
- break;
- case 1:
- rust_add_target_info("target_feature", "inline-int-divide-min-latency");
- break;
- case 2:
- rust_add_target_info("target_feature", "inline-int-divide-max-throughput");
- break;
- default: // TODO: is this an error? should this be an error?
- break;
- }
- switch (TARGET_INLINE_SQRT) {
- case 0:
- rust_add_target_info("target_feature", "no-inline-sqrt");
- break;
- case 1:
- rust_add_target_info("target_feature", "inline-sqrt-min-latency");
- break;
- case 2:
- rust_add_target_info("target_feature", "inline-sqrt-max-throughput");
- break;
- default: // TODO: is this an error? should this be an error?
- break;
- }
-
- if (TARGET_DWARF2_ASM)
- rust_add_target_info("target_feature", "dwarf2-asm");
- if (TARGET_EARLY_STOP_BITS)
- rust_add_target_info("target_feature", "early-stop-bits");
- // TODO: do fixed-range somehow (wouldn't work well as define, I don't think), same for tls-size
-
- if (mflag_sched_br_data_spec)
- rust_add_target_info("target_feature", "sched-br-data-spec");
- if (mflag_sched_ar_data_spec)
- rust_add_target_info("target_feature", "sched-ar-data-spec");
- if (mflag_sched_control_spec)
- rust_add_target_info("target_feature", "sched-control-spec");
- if (mflag_sched_br_in_data_spec)
- rust_add_target_info("target_feature", "sched-br-in-data-spec");
- if (mflag_sched_ar_in_data_spec)
- rust_add_target_info("target_feature", "sched-ar-in-data-spec");
- if (mflag_sched_in_control_spec)
- rust_add_target_info("target_feature", "sched-in-control-spec");
- if (mflag_sched_spec_ldc)
- rust_add_target_info("target_feature", "sched-spec-ldc");
- if (mflag_sched_spec_control_ldc)
- rust_add_target_info("target_feature", "sched-spec-control-ldc");
- if (mflag_sched_count_spec_in_critical_path)
- rust_add_target_info("target_feature", "sched-count-spec-in-critical-path");
- if (mflag_sched_stop_bits_after_every_cycle)
- rust_add_target_info("target_feature", "sched-stop-bits-after-every-cycle");
- if (mflag_sched_fp_mem_deps_zero_cost)
- rust_add_target_info("target_feature", "sched-fp-mem-deps-zero-cost");
- if (mflag_sched_mem_insns_hard_limit)
- rust_add_target_info("target_feature", "sched-max-memory-insns-hard-limit");
- if (mflag_sel_sched_dont_check_control_spec)
- rust_add_target_info("target_feature", "sel-sched-dont-check-control-spec");
- // TODO: do sched-max-memory-insns somehow (wouldn't work well as define)
-}
diff --git a/gcc/config/m68k/m68k-rust.cc b/gcc/config/m68k/m68k-rust.cc
deleted file mode 100644
index bad94e4657d..00000000000
--- a/gcc/config/m68k/m68k-rust.cc
+++ /dev/null
@@ -1,63 +0,0 @@
-/* Subroutines for the Rust front end for the Motorola 680x0/ColdFire architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for Motorola 680x0/ColdFire targets. */
-
-void m68k_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "m68k");
-
- /* llvm has no current or historical support for m68k, and llvm forks and mrustc don't suggest any
- * true target feature names, so I made up names and features */
- // TODO: maybe define subarches as features? probably needed, but not sure how well it interacts
- if (TARGET_ALIGN_INT)
- rust_add_target_info("target_feature", "align-int");
- if (TARGET_BITFIELD)
- rust_add_target_info("target_feature", "bitfield");
- if (TARGET_CF_HWDIV)
- rust_add_target_info("target_feature", "div");
- if (TARGET_HARD_FLOAT)
- rust_add_target_info("target_feature", "hard-float");
- else
- rust_add_target_info("target_feature", "soft-float");
- if (TARGET_ID_SHARED_LIBRARY)
- rust_add_target_info("target_feature", "id-shared-library");
- if (TARGET_LONG_JUMP_TABLE_OFFSETS)
- rust_add_target_info("target_feature", "long-jump-table-offsets");
- if (TARGET_RTD)
- rust_add_target_info("target_feature", "rtd");
- if (TARGET_SHORT)
- rust_add_target_info("target_feature", "short");
- if (TARGET_PCREL)
- rust_add_target_info("target_feature", "pcrel");
- if (TARGET_SEP_DATA)
- rust_add_target_info("target_feature", "sep-data");
- // TODO: see if can get information about shared-library-id
- if (TARGET_STRICT_ALIGNMENT)
- rust_add_target_info("target_feature", "strict-align");
- if (TARGET_XGOT)
- rust_add_target_info("target_feature", "xgot");
- if (TARGET_XTLS)
- rust_add_target_info("target_feature", "xtls");
-}
diff --git a/gcc/config/mips/mips-rust.cc b/gcc/config/mips/mips-rust.cc
deleted file mode 100644
index 31b9c222de4..00000000000
--- a/gcc/config/mips/mips-rust.cc
+++ /dev/null
@@ -1,297 +0,0 @@
-/* Subroutines for the Rust front end for the MIPS architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Add target info for MIPS-I ISA support. */
-
-static void mips1_target_info(void) {
- rust_add_target_info("target_feature", "mips1");
-}
-
-/* Add target info for MIPS-II ISA support. */
-
-static void mips2_target_info(void) {
- rust_add_target_info("target_feature", "mips2");
- mips1_target_info();
-}
-
-/* Add target info for MIPS-III ISA (MIPS32 subset) support. */
-
-static void mips3_32_target_info(void) {
- rust_add_target_info("target_feature", "mips3_32");
-}
-
-/* Add target info for MIPS-III ISA (MIPS32r2 subset) support. */
-
-static void mips3_32r2_target_info(void) {
- rust_add_target_info("target_feature", "mips3_32r2");
-}
-
-/* Add target info for MIPS-III ISA support. */
-
-static void mips3_target_info(void) {
- rust_add_target_info("target_feature", "mips3");
- mips2_target_info();
- mips3_32_target_info();
- mips3_32r2_target_info();
- // maybe always have FeatureGP64Bit and FeatureFP64Bit? or maybe make them prereqs?
-}
-
-/* Add target info for MIPS-IV ISA (MIPS32 subset) support. */
-
-static void mips4_32_target_info(void) {
- rust_add_target_info("target_feature", "mips4_32");
-}
-
-/* Add target info for MIPS-IV ISA (MIPS32r2 subset) support. */
-
-static void mips4_32r2_target_info(void) {
- rust_add_target_info("target_feature", "mips4_32r2");
-}
-
-/* Add target info for MIPS-IV ISA support. */
-
-static void mips4_target_info(void) {
- rust_add_target_info("target_feature", "mips4");
- mips3_target_info();
- mips4_32_target_info();
- mips4_32r2_target_info();
-}
-
-/* Add target info for MIPS-V ISA (MIPS32r2 subset) support. */
-
-static void mips5_32r2_target_info(void) {
- rust_add_target_info("target_feature", "mips5_32r2");
-}
-
-/* Add target info for MIPS-V ISA support. */
-
-static void mips5_target_info(void) {
- rust_add_target_info("target_feature", "mips5");
- mips4_target_info();
- mips5_32r2_target_info();
-}
-
-/* Add target info for MIPS32 ISA support. */
-
-static void mips32_target_info(void) {
- rust_add_target_info("target_feature", "mips32");
- mips2_target_info();
- mips3_32_target_info();
- mips4_32_target_info();
-}
-
-/* Add target info for MIPS32r2 ISA support. */
-
-static void mips32r2_target_info(void) {
- rust_add_target_info("target_feature", "mips32r2");
- mips32_target_info();
- mips3_32r2_target_info();
- mips4_32r2_target_info();
- mips5_32r2_target_info();
-}
-
-/* Add target info for MIPS32r3 ISA support. */
-
-static void mips32r3_target_info(void) {
- rust_add_target_info("target_feature", "mips32r3");
- mips32r2_target_info();
-}
-
-/* Add target info for MIPS32r5 ISA support. */
-
-static void mips32r5_target_info(void) {
- rust_add_target_info("target_feature", "mips32r5");
- mips32r3_target_info();
-}
-
-/* Add target info for MIPS32r6 ISA support. */
-
-static void mips32r6_target_info(void) {
- rust_add_target_info("target_feature", "mips32r6");
- mips32r5_target_info();
- // maybe also hardcode having FeatureFP64Bit, FeatureNaN2008, and FeatureAbs2008, or have prereqs
-}
-
-/* Add target info for MIPS64 ISA support. */
-
-static void mips64_target_info(void) {
- rust_add_target_info("target_feature", "mips64");
- mips32_target_info();
- mips5_target_info();
-}
-
-/* Add target info for MIPS64r2 ISA support. */
-
-static void mips64r2_target_info(void) {
- rust_add_target_info("target_feature", "mips64r2");
- mips64_target_info();
- mips32r2_target_info();
-}
-
-/* Add target info for MIPS64r3 ISA support. */
-
-static void mips64r3_target_info(void) {
- rust_add_target_info("target_feature", "mips64r3");
- mips64r2_target_info();
- mips32r3_target_info();
-}
-
-/* Add target info for MIPS64r5 ISA support. */
-
-static void mips64r5_target_info(void) {
- rust_add_target_info("target_feature", "mips64r5");
- mips64r3_target_info();
- mips32r5_target_info();
-}
-
-/* Add target info for MIPS64r6 ISA support. */
-
-static void mips64r6_target_info(void) {
- rust_add_target_info("target_feature", "mips64r6");
- mips64r5_target_info();
- mips32r6_target_info();
- // maybe hardcode FeatureNaN2008 and FeatureAbs2008, or just have them as prereqs?
-}
-
-/* Implement TARGET_RUST_CPU_INFO for MIPS targets. */
-
-void mips_rust_target_cpu_info(void) {
- if (TARGET_64BIT)
- rust_add_target_info("target_arch", "mips64");
- else
- rust_add_target_info("target_arch", "mips");
-
- // features and names based on llvm if not in rustc
- // TODO maybe implement more features that aren't in llvm but are in gcc at some point?
- if (!(TARGET_ABICALLS))
- rust_add_target_info("target_feature", "noabicalls");
- if (POINTER_SIZE == 64)
- rust_add_target_info("target_feature", "ptr64");
- if (TARGET_64BIT)
- rust_add_target_info("target_feature", "gp64");
- if (TARGET_FLOAT64)
- rust_add_target_info("target_feature", "fp64");
- if (TARGET_FLOATXX)
- rust_add_target_info("target_feature", "fpxx");
- // TODO: ensure below variables work
- if (mips_nan == MIPS_IEEE_754_2008)
- rust_add_target_info("target_feature", "nan2008");
- if (mips_abs == MIPS_IEEE_754_2008)
- rust_add_target_info("target_feature", "abs2008");
- if (TARGET_SINGLE_FLOAT)
- rust_add_target_info("target_feature", "single-float");
- if (TARGET_SOFT_FLOAT_ABI)
- rust_add_target_info("target_feature", "soft-float");
- if (!TARGET_ODD_SPREG)
- rust_add_target_info("target_feature", "nooddspreg");
- // TODO: find if vfpu (vector FPU instructions) are supported by gcc at all
- // TODO: ensure below switch variable and whatever works
- switch (mips_isa_option) {
- case 0:
- mips1_target_info();
- break;
- case 1:
- mips2_target_info();
- break;
- case 2:
- mips3_target_info();
- break;
- case 3:
- mips4_target_info();
- break;
- case 4:
- mips32_target_info();
- break;
- case 5:
- mips32r2_target_info();
- break;
- case 6:
- mips32r3_target_info();
- break;
- case 7:
- mips32r5_target_info();
- break;
- case 8:
- mips32r6_target_info();
- break;
- case 9:
- mips64_target_info();
- break;
- case 10:
- mips64r2_target_info();
- break;
- case 11:
- mips64r3_target_info();
- break;
- case 12:
- mips64r5_target_info();
- break;
- case 13:
- mips64r6_target_info();
- break;
- default: // unknown isa level - should this be an error?
- break;
- }
- if (TARGET_SYM32)
- rust_add_target_info("target_feature", "sym32");
- if (TARGET_MIPS16)
- rust_add_target_info("target_feature", "mips16");
- if (TARGET_DSP) {
- rust_add_target_info("target_feature", "dsp");
-
- if (TARGET_DSPR2) {
- rust_add_target_info("target_feature", "dspr2");
-
- // TODO: add dspr3 if can find gcc equivalent option
- }
- }
- if (TARGET_MIPS3D)
- rust_add_target_info("target_feature", "mips3d");
- if (TARGET_MSA)
- rust_add_target_info("target_feature", "msa");
- if (TARGET_EVA)
- rust_add_target_info("target_feature", "eva");
- if (TARGET_CRC)
- rust_add_target_info("target_feature", "crc");
- if (TARGET_VIRT)
- rust_add_target_info("target_feature", "virt");
- if (TARGET_GINV)
- rust_add_target_info("target_feature", "ginv");
- if (TARGET_MICROMIPS)
- rust_add_target_info("target_feature", "micromips");
- // TODO: add cnmips and cnmipsp if there are gcc equivalent features
- // TODO: find out what use-tcc-in-div ("force the assembler to use trapping") corresponds to
- // TODO ensure below variable works
- if (!mips_madd4)
- rust_add_target_info("target_feature", "nomadd4");
- if (TARGET_MT)
- rust_add_target_info("target_feature", "mt");
- if (TARGET_LONG_CALLS)
- rust_add_target_info("target_feature", "long-calls");
- if (TARGET_XGOT)
- rust_add_target_info("target_feature", "xgot");
- /* TODO: find out what use-indirect-jump-hazard corresponds with ("use indirect jump guards to prevent
- * certain speculation based attacks") */
-}
diff --git a/gcc/config/nds32/nds32-rust.cc b/gcc/config/nds32/nds32-rust.cc
deleted file mode 100644
index e866674f7ad..00000000000
--- a/gcc/config/nds32/nds32-rust.cc
+++ /dev/null
@@ -1,194 +0,0 @@
-/* Subroutines for the Rust front end for the NDS32 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for NDS32 targets. */
-
-void nds32_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "nds32");
-
- // made up names as no apparent support (current or historical) in llvm
- // TODO: maybe have cpu types as features? might be a lot, though
- if (TARGET_REDUCED_REGS)
- rust_add_target_info("target_feature", "reduced-regs");
- if (TARGET_ALWAYS_ALIGN)
- rust_add_target_info("target_feature", "always-align");
- if (TARGET_ALIGN_FUNCTION)
- rust_add_target_info("target_feature", "align-functions");
- if (TARGET_FORCE_FP_AS_GP)
- rust_add_target_info("target_feature", "force-fp-as-gp");
- if (TARGET_FORBID_FP_AS_GP)
- rust_add_target_info("target_feature", "forbid-fp-as-gp");
- // TODO: ensure below variables work
- if (nds32_ict_model == ICT_MODEL_SMALL)
- rust_add_target_info("target_feature", "ict-model-small");
- else if (nds32_ict_model == ICT_MODEL_LARGE)
- rust_add_target_info("target_feature", "ict-model-large");
- if (TARGET_CMOV)
- rust_add_target_info("target_feature", "cmov");
- if (TARGET_HW_ABS)
- rust_add_target_info("target_feature", "hw-abs");
- if (TARGET_EXT_PERF)
- rust_add_target_info("target_feature", "ext-perf");
- if (TARGET_EXT_PERF2)
- rust_add_target_info("target_feature", "ext-perf2");
- if (TARGET_EXT_STRING)
- rust_add_target_info("target_feature", "ext-string");
- if (TARGET_EXT_DSP)
- rust_add_target_info("target_feature", "ext-dsp");
- if (TARGET_V3PUSH)
- rust_add_target_info("target_feature", "v3push");
- if (TARGET_16_BIT)
- rust_add_target_info("target_feature", "16-bit");
- if (TARGET_RELAX_HINT)
- rust_add_target_info("target_feature", "relax-hint");
- if (TARGET_VH)
- rust_add_target_info("target_feature", "vh");
- if (TARGET_ISR_VECTOR_SIZE_4_BYTE)
- rust_add_target_info("target_feature", "isr-vector-size-4");
- else
- rust_add_target_info("target_feature", "isr-vector-size-16");
- // TODO: figure out how to handle nds32_isr_secure_level (isr-secure)
- // TODO: ensure below switch variable and whatever works
- switch (nds32_cache_block_size) {
- // note: supposedly only powers of 2 between 4 and 512
- case 4:
- rust_add_target_info("target_feature", "cache-block-size-4");
- break;
- case 8:
- rust_add_target_info("target_feature", "cache-block-size-8");
- break;
- case 16:
- rust_add_target_info("target_feature", "cache-block-size-16");
- break;
- case 32:
- rust_add_target_info("target_feature", "cache-block-size-32");
- break;
- case 64:
- rust_add_target_info("target_feature", "cache-block-size-64");
- break;
- case 128:
- rust_add_target_info("target_feature", "cache-block-size-128");
- break;
- case 256:
- rust_add_target_info("target_feature", "cache-block-size-256");
- break;
- case 512:
- rust_add_target_info("target_feature", "cache-block-size-512");
- break;
- default: // unknown cache block size - should this be an error?
- break;
- }
- // TODO: ensure below switch and variable works - should this be cumulative or exclusive like now?
- switch (nds32_arch_option) {
- case ARCH_V2:
- rust_add_target_info("target_feature", "v2");
- break;
- case ARCH_V3:
- rust_add_target_info("target_feature", "v3");
- break;
- case ARCH_V3J:
- rust_add_target_info("target_feature", "v3j");
- break;
- case ARCH_V3M:
- rust_add_target_info("target_feature", "v3m");
- break;
- case ARCH_V3F:
- rust_add_target_info("target_feature", "v3f");
- break;
- case ARCH_V3S:
- rust_add_target_info("target_feature", "v3s");
- break;
- default: // unknown arch (isa level) - should this be an error?
- break;
- }
- // TODO: stuff below is taken from cpp defines - may be better to define 4-7 separately?
- if (TARGET_FPU_SINGLE || TARGET_FPU_DOUBLE) {
- switch (nds32_fp_regnum) {
- case 0:
- case 4:
- rust_add_target_info("target_feature", "config-fpu-0");
- break;
- case 1:
- case 5:
- rust_add_target_info("target_feature", "config-fpu-1");
- break;
- case 2:
- case 6:
- rust_add_target_info("target_feature", "config-fpu-2");
- break;
- case 3:
- case 7:
- rust_add_target_info("target_feature", "config-fpu-3");
- break;
- default:
- gcc_unreachable();
- }
- }
- // TODO: ensure below switch and variable works
- switch (nds32_mul_config) {
- case MUL_TYPE_FAST_1:
- rust_add_target_info("target_feature", "config-mul-fast1");
- break;
- case MUL_TYPE_FAST_2:
- rust_add_target_info("target_feature", "config-mul-fast2");
- break;
- case MUL_TYPE_SLOW:
- rust_add_target_info("target_feature", "config-mul-slow");
- break;
- default: // unknown arch (isa level) - should this be an error?
- break;
- }
- // TODO: ensure below switch and variable works
- switch (nds32_register_ports_config) {
- case REG_PORT_3R2W:
- rust_add_target_info("target_feature", "config-register-ports-3r2w");
- break;
- case REG_PORT_2R1W:
- rust_add_target_info("target_feature", "config-register-ports-2r1w");
- break;
- default: // unknown arch (isa level) - should this be an error?
- break;
- }
- // TODO: add ctor-dtor and relax if can figure out how to get data from it
- if (TARGET_EXT_FPU_FMA)
- rust_add_target_info("target_feature", "ext-fpu-fma");
- if (TARGET_FPU_SINGLE)
- rust_add_target_info("target_feature", "ext-fpu-sp");
- if (TARGET_FPU_DOUBLE)
- rust_add_target_info("target_feature", "ext-fpu-dp");
- if (TARGET_FORCE_NO_EXT_DSP)
- rust_add_target_info("target_feature", "force-no-ext-dsp");
- // TODO: ensure below variables work
- if (flag_sched_prolog_epilog)
- rust_add_target_info("target_feature", "sched-prolog-epilog");
- if (flag_ret_in_naked_func)
- rust_add_target_info("target_feature", "ret-in-naked-func");
- if (flag_always_save_lp)
- rust_add_target_info("target_feature", "always-save-lp");
- if (flag_unaligned_access)
- rust_add_target_info("target_feature", "unaligned-access");
- if (flag_inline_asm_r15)
- rust_add_target_info("target_feature", "inline-asm-r15");
-}
diff --git a/gcc/config/nios2/nios2-rust.cc b/gcc/config/nios2/nios2-rust.cc
deleted file mode 100644
index c00194ca08b..00000000000
--- a/gcc/config/nios2/nios2-rust.cc
+++ /dev/null
@@ -1,90 +0,0 @@
-/* Subroutines for the Rust front end for the Altera Nios II architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for Altera Nios II targets. */
-
-void nios2_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "nios2");
-
- // made up (most) names as only apparently basic historical support in llvm
- if (TARGET_HAS_DIV)
- rust_add_target_info("target_feature", "hw-div");
- if (TARGET_HAS_MUL)
- rust_add_target_info("target_feature", "hw-mul");
- if (TARGET_HAS_MULX)
- rust_add_target_info("target_feature", "hw-mulx");
- if (TARGET_FAST_SW_DIV)
- rust_add_target_info("target_feature", "fast-sw-div");
- if (TARGET_BYPASS_CACHE)
- rust_add_target_info("target_feature", "bypass-cache");
- if (TARGET_BYPASS_CACHE_VOLATILE)
- rust_add_target_info("target_feature", "no-cache-volatile");
- // TODO: ensure below switch variable and whatever works
- // TODO: improve how this works? the defining kinda sucks a bit
- switch (nios2_gpopt_option) {
- case gpopt_none:
- rust_add_target_info("target_feature", "gpopt-none");
- break;
- case gpopt_local:
- rust_add_target_info("target_feature", "gpopt-local");
- break;
- case gpopt_global:
- rust_add_target_info("target_feature", "gpopt-global");
- break;
- case gpopt_data:
- rust_add_target_info("target_feature", "gpopt-data");
- break;
- case gpopt_all:
- rust_add_target_info("target_feature", "gpopt-all");
- break;
- default: // unknown gpopt status - should this be an error?
- break;
- }
- if (TARGET_BIG_ENDIAN)
- rust_add_target_info("target_feature", "eb");
- else
- rust_add_target_info("target_feature", "el");
- /* TODO: figure out how to have custom-fpu-cfg, custom-ftruncds (including no-custom-ftruncds),
- * etc. (all custom instructions and their no- equivalents) in define form */
- // TODO: ensure below switch and variable works
- switch (nios2_arch_option) {
- case ARCH_R1:
- rust_add_target_info("target_feature", "r1");
- rust_add_target_info("target_feature", "nios2r1");
- break;
- case ARCH_R2:
- rust_add_target_info("target_feature", "r2");
- rust_add_target_info("target_feature", "nios2r2");
- break;
- default: // should this be an error?
- break;
- }
- if (TARGET_HAS_BMX)
- rust_add_target_info("target_feature", "bmx");
- if (TARGET_HAS_CDX)
- rust_add_target_info("target_feature", "cdx");
- // TODO: figure out how to have gprel-sec and r0rel-sec as defines
- // TODO: maybe extra defines for features available on bare metal target? (hal, smallc, etc.)
-}
diff --git a/gcc/config/nvptx/nvptx-rust.cc b/gcc/config/nvptx/nvptx-rust.cc
deleted file mode 100644
index 0e18abd5435..00000000000
--- a/gcc/config/nvptx/nvptx-rust.cc
+++ /dev/null
@@ -1,64 +0,0 @@
-/* Subroutines for the Rust front end for the Nvidia PTX architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for NVPTX targets. */
-
-void nvptx_rust_target_cpu_info(void) {
- if (TARGET_ABI64)
- rust_add_target_info("target_arch", "nvptx64");
- else
- rust_add_target_info("target_arch", "nvptx");
-
- // TODO: should this also override target_os and target_vendor to be "cuda" and "nvidia"?
-
- // names derived from llvm
- // TODO: ensure below variable and switch works
- switch (ptx_isa_option) {
- /* TODO: if gcc adds other sm versions (llvm has 20, 21, 32, 37, 50, 52, 53, 60, 61, 62, 70, 72,
- * 75, 80 as well), add them here */
- case PTX_ISA_SM30:
- rust_add_target_info("target_feature", "sm_30");
- break;
- case PTX_ISA_SM35:
- rust_add_target_info("target_feature", "sm_35");
- break;
- default: // should this be an error?
- break;
- }
- /* TODO: add ptx versions as separate features if gcc adds them (ptx32, 40, 41, 42, 43, 50, 60, 61,
- * 63, 64, 65, 70) */
-
- // NOTE: below are all gcc-derived features that do not appear in llvm. they appeared useful, so added
- // TODO: ensure below variable works
- if (nvptx_optimize)
- rust_add_target_info("target_feature", "optimize");
- if (TARGET_SOFT_STACK)
- rust_add_target_info("target_feature", "soft-stack");
- // TODO: find way to have soft-stack-reserve-local as define
- if (TARGET_UNIFORM_SIMT)
- rust_add_target_info("target_feature", "uniform-simt");
- if (TARGET_GOMP)
- rust_add_target_info("target_feature", "gomp");
-}
diff --git a/gcc/config/or1k/or1k-rust.cc b/gcc/config/or1k/or1k-rust.cc
deleted file mode 100644
index f0b8cee2609..00000000000
--- a/gcc/config/or1k/or1k-rust.cc
+++ /dev/null
@@ -1,58 +0,0 @@
-/* Subroutines for the Rust front end for the OpenRISC architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for OpenRISC targets. */
-
-void or1k_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "or1k");
-
- // names derived from llvm fork
- if (!(TARGET_SOFT_MUL))
- rust_add_target_info("target_feature", "mul");
- if (!(TARGET_SOFT_DIV))
- rust_add_target_info("target_feature", "div");
- if (TARGET_ROR)
- rust_add_target_info("target_feature", "ror");
- if (TARGET_CMOV)
- rust_add_target_info("target_feature", "cmov");
- /* TODO: add options for addc (add with carry), ffl1 (find first/last one), interrupts (use
- * l.lwa/l.swa for atomic RMW ops) if can find gcc equivalents. */
- if (TARGET_SEXT)
- rust_add_target_info("target_feature", "ext");
-
- // below are options not in llvm but derived from gcc, as they seemed potentially useful
- if (TARGET_HARD_FLOAT)
- rust_add_target_info("target_feature", "hard-float");
- if (TARGET_DOUBLE_FLOAT)
- rust_add_target_info("target_feature", "double-float");
- if (TARGET_FP_UNORDERED)
- rust_add_target_info("target_feature", "unordered-float");
- if (TARGET_RORI)
- rust_add_target_info("target_feature", "rori");
- if (TARGET_SFIMM)
- rust_add_target_info("target_feature", "sfimm");
- if (TARGET_SHFTIMM)
- rust_add_target_info("target_feature", "shftimm");
-}
diff --git a/gcc/config/pa/pa-rust.cc b/gcc/config/pa/pa-rust.cc
deleted file mode 100644
index aab742f888d..00000000000
--- a/gcc/config/pa/pa-rust.cc
+++ /dev/null
@@ -1,88 +0,0 @@
-/* Subroutines for the Rust front end for the HPPA architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for HPPA targets. */
-
-void pa_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "hppa");
-
- // names made up by me (as no apparent current nor historical llvm support), based on gcc options
- /* TODO: figure out how to get data for linker-opt, nosnake - not defined in variable, apparently */
- if (TARGET_CALLER_COPIES)
- rust_add_target_info("target_feature", "caller-copies");
- if (TARGET_COHERENT_LDCW)
- rust_add_target_info("target_feature", "coherent-ldcw");
- if (TARGET_DISABLE_FPREGS)
- rust_add_target_info("target_feature", "disable-fpregs");
- if (TARGET_DISABLE_INDEXING)
- rust_add_target_info("target_feature", "disable-indexing");
- if (TARGET_FAST_INDIRECT_CALLS)
- rust_add_target_info("target_feature", "fast-indirect-calls");
- // TODO: figure out how to represent fixed-range (ranges of registers to make fixed) as define
- if (TARGET_GAS)
- rust_add_target_info("target_feature", "gas");
- if (TARGET_LONG_CALLS)
- rust_add_target_info("target_feature", "long-calls");
- if (TARGET_LONG_LOAD_STORE)
- rust_add_target_info("target_feature", "long-load-store");
- if (TARGET_NO_SPACE_REGS)
- rust_add_target_info("target_feature", "no-space-regs");
- if (TARGET_ORDERED)
- rust_add_target_info("target_feature", "ordered");
- if (TARGET_PORTABLE_RUNTIME)
- rust_add_target_info("target_feature", "portable-runtime");
- if (TARGET_SOFT_FLOAT)
- rust_add_target_info("target_feature", "soft-float");
-
- // defines for generating PA 1.1 or PA 2.0 code - TODO should PA 2.0 imply PA 1.1 as well?
- if (TARGET_PA_11)
- rust_add_target_info("target_feature", "pa-risc-1-1");
- if (TARGET_PA_20)
- rust_add_target_info("target_feature", "pa-risc-2-0");
-
- // TODO: ensure switch and variable work
- switch (pa_cpu) {
- case PROCESSOR_8000:
- rust_add_target_info("target_feature", "schedule-8000");
- break;
- case PROCESSOR_7100:
- rust_add_target_info("target_feature", "schedule-7100");
- break;
- case PROCESSOR_700:
- rust_add_target_info("target_feature", "schedule-700");
- break;
- case PROCESSOR_7100LC:
- rust_add_target_info("target_feature", "schedule-7100lc");
- break;
- case PROCESSOR_7200:
- rust_add_target_info("target_feature", "schedule-7200");
- break;
- case PROCESSOR_7300:
- rust_add_target_info("target_feature", "schedule-7300");
- break;
- default: // should this be an error?
- break;
- }
-}
diff --git a/gcc/config/pdp11/pdp11-rust.cc b/gcc/config/pdp11/pdp11-rust.cc
deleted file mode 100644
index 4b195657364..00000000000
--- a/gcc/config/pdp11/pdp11-rust.cc
+++ /dev/null
@@ -1,59 +0,0 @@
-/* Subroutines for the Rust front end for the PDP-11 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for PDP-11 targets. */
-
-void pdp11_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "pdp11");
-
- // names made up by me (as no apparent current nor historical llvm support), based on gcc options
- /* TODO: figure out how to get data for linker-opt, nosnake - not defined in variable, apparently */
- if (TARGET_AC0)
- rust_add_target_info("target_feature", "ac0");
- if (TARGET_DEC_ASM)
- rust_add_target_info("target_feature", "dec-asm");
- if (TARGET_GNU_ASM)
- rust_add_target_info("target_feature", "gnu-asm");
- if (TARGET_UNIX_ASM)
- rust_add_target_info("target_feature", "unix-asm");
- if (TARGET_FPU)
- rust_add_target_info("target_feature", "fpu");
- else
- rust_add_target_info("target_feature", "soft-float");
- if (TARGET_INT32)
- rust_add_target_info("target_feature", "int32");
- else
- rust_add_target_info("target_feature", "int16");
- if (TARGET_SPLIT)
- rust_add_target_info("target_feature", "split");
- if (TARGET_LRA)
- rust_add_target_info("target_feature", "lra");
-
- // defines for generating -40 and -45 code - TODO should -45 imply -40 as well? -10 seems implicit
- if (TARGET_40)
- rust_add_target_info("target_feature", "pa-risc-1-1");
- if (TARGET_45)
- rust_add_target_info("target_feature", "pa-risc-2-0");
-}
diff --git a/gcc/config/riscv/riscv-rust.cc b/gcc/config/riscv/riscv-rust.cc
deleted file mode 100644
index 27d41aea8bf..00000000000
--- a/gcc/config/riscv/riscv-rust.cc
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Subroutines for the Rust front end for the RISC-V architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for RISC-V targets. */
-
-void riscv_rust_target_cpu_info(void) {
- if (TARGET_64BIT)
- rust_add_target_info("target_arch", "riscv64");
- else
- rust_add_target_info("target_arch", "riscv32");
-
- // names derived from rustc and llvm
- if (TARGET_SAVE_RESTORE)
- rust_add_target_info("target_feature", "save-restore");
- // TODO: ensure below variable works
- if (riscv_mrelax)
- rust_add_target_info("target_feature", "relax");
- if (TARGET_MUL)
- rust_add_target_info("target_feature", "m");
- if (TARGET_ATOMIC)
- rust_add_target_info("target_feature", "a");
- if (TARGET_HARD_FLOAT)
- rust_add_target_info("target_feature", "f");
- if (TARGET_DOUBLE_FLOAT)
- rust_add_target_info("target_feature", "d");
- if (TARGET_RVC)
- rust_add_target_info("target_feature", "c");
- if (TARGET_RVE)
- rust_add_target_info("target_feature", "e");
- // TODO: add features based on "B" and "V" extensions when gcc adds them
- // TODO: if gcc has it, add "no-rvc-hints" flag
- // TODO: if gcc has it, add reserve-x1 -> reserve-x31 (user reserve registers)
- if (TARGET_64BIT)
- rust_add_target_info("target_feature", "64bit");
- /* TODO: maybe add gcc features with no llvm equivalent, e.g. align-data, riscv-attribute,
- * explicit-relocs, strict-align, cmodel, small-data-limit, branch-cost, plt, abi,
- * preferred-stack-boundary, fdiv, div */
-}
diff --git a/gcc/config/rs6000/rs6000-rust.cc b/gcc/config/rs6000/rs6000-rust.cc
deleted file mode 100644
index f1211490e88..00000000000
--- a/gcc/config/rs6000/rs6000-rust.cc
+++ /dev/null
@@ -1,81 +0,0 @@
-/* Subroutines for the Rust front end on the PowerPC architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for PowerPC targets. */
-
-void
-rs6000_rust_target_cpu_info (void)
-{
- // note that rustc makes no arch distinction between powerpc64 and powerpc64 little endian
- if (TARGET_64BIT)
- rust_add_target_info ("target_arch", "powerpc64");
- else
- rust_add_target_info ("target_arch", "powerpc");
-
- // TODO: define properly instead of macros
-#ifdef flags
-# error "multiple flags already defined in rs6000-rust.cc"
-#endif
-#define flags rs6000_isa_flags
-
- // options should be (almost at least - i.e. power8-altivec and the like) feature complete with rustc
- if ((flags & OPTION_MASK_ALTIVEC) != 0)
- rust_add_target_info ("target_feature", "altivec");
- if ((flags & OPTION_MASK_VSX) != 0)
- rust_add_target_info ("target_feature", "vsx");
- /* I can't find any separate gcc equivalent to "power8-altivec" in llvm, but power8-vector has it as a
- * prerequisite, so just implicitly enable it when enabling the vector. TODO search for it. */
- if ((flags & OPTION_MASK_P8_VECTOR) != 0) {
- rust_add_target_info ("target_feature", "power8-vector");
- rust_add_target_info ("target_feature", "power8-altivec");
- }
- if ((flags & OPTION_MASK_CRYPTO) != 0)
- rust_add_target_info ("target_feature", "crypto");
- if ((flags & OPTION_MASK_HTM) != 0)
- rust_add_target_info ("target_feature", "htm");
- if ((flags & OPTION_MASK_FLOAT128_KEYWORD) != 0)
- rust_add_target_info ("target_feature", "float128");
- // Same implicit enabling of power9-altivec happens with power9-vector.
- if ((flags & OPTION_MASK_P9_VECTOR) != 0) {
- rust_add_target_info ("target_feature", "power9-vector");
- rust_add_target_info ("target_feature", "power9-altivec");
- }
- if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)
- rust_add_target_info ("target_feature", "direct-move");
-
- if (TARGET_SECURE_PLT)
- rust_add_target_info ("target_feature", "secure-plt");
-
- if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
- ; // apparently not an option - TODO find out if it is
- else
- rust_add_target_info ("target_feature", "hard-float");
-
- // TODO: some possible features (in rustc, listed under powerpc-wrs-vxworks-spe) - "msync"
- // other possible features (in clang) - "qpx" (when cpu = "a2q"), "bpermd", "extdiv", "spe"
-
- // note: in gcc, it is possible bpermd is available if popcntd is available (which is power 7)
-
-#undef flags
-}
diff --git a/gcc/config/rx/rx-rust.cc b/gcc/config/rx/rx-rust.cc
deleted file mode 100644
index 62792b37079..00000000000
--- a/gcc/config/rx/rx-rust.cc
+++ /dev/null
@@ -1,75 +0,0 @@
-/* Subroutines for the Rust front end for the Renesas RX architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for RX targets. */
-
-void rx_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "rx");
-
- // llvm appears to have no (current or historical) support, so names made up by me
- if (TARGET_64BIT_DOUBLES)
- rust_add_target_info("target_feature", "64bit-doubles");
- if (TARGET_NO_USE_FPU)
- rust_add_target_info("target_feature", "nofpu");
- // TODO: ensure below switch and variable works
- switch (rx_cpu_type) {
- case RX610:
- rust_add_target_info("target_feature", "cpu-rx610");
- break;
- case RX200:
- rust_add_target_info("target_feature", "cpu-rx200");
- break;
- case RX600:
- rust_add_target_info("target_feature", "cpu-rx600");
- break;
- case RX100:
- rust_add_target_info("target_feature", "cpu-rx100");
- break;
- default: // should this be an error? probably shouldn't happen
- break;
- }
- if (TARGET_BIG_ENDIAN_DATA)
- rust_add_target_info("target_feature", "big-endian-data");
- // TODO: find way of having small-data-limit, max-constant-size, int-register as defines
- // TODO: find way of getting info for relax
- if (TARGET_SAVE_ACC_REGISTER)
- rust_add_target_info("target_feature", "save-acc-in-interrupts");
- if (TARGET_PID)
- rust_add_target_info("target_feature", "pid");
- // TODO: ensure below variable works
- if (rx_warn_multiple_fast_interrupts)
- rust_add_target_info("target_feature", "warn-multiple-fast-interrupts");
- if (TARGET_GCC_ABI)
- rust_add_target_info("target_feature", "gcc-abi");
- else
- rust_add_target_info("target_feature", "rx-abi");
- if (TARGET_ENABLE_LRA)
- rust_add_target_info("target_feature", "lra");
- // TODO: ensure below variable works
- if (rx_allow_string_insns)
- rust_add_target_info("target_feature", "allow-string-insns");
- if (TARGET_JSR)
- rust_add_target_info("target_feature", "jsr");
-}
diff --git a/gcc/config/s390/s390-rust.cc b/gcc/config/s390/s390-rust.cc
deleted file mode 100644
index 8af43dcf575..00000000000
--- a/gcc/config/s390/s390-rust.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/* Subroutines for the Rust front end for the IBM S/390 and zSeries architectures.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for S/390 and zSeries targets. */
-
-void s390_rust_target_cpu_info(void) {
- // TODO: ensure that this is right for llvm/rustc arch
- if (TARGET_64BIT)
- rust_add_target_info("target_arch", "s390x");
- else
- rust_add_target_info("target_arch", "s390");
-
- // names derived from llvm and rustc
- if (TARGET_SOFT_FLOAT)
- rust_add_target_info("target_feature", "soft-float");
- else
- rust_add_target_info("target_feature", "fp-extension");
- // TODO: ensure that having hardware float is actually what fp-extension refers to
- /* TODO: find gcc equivalent of distinct-ops (distinct-operands facility), fast-serialization,
- * high-word, interlocked-access1, load-store-on-cond, population-count,
- * message-security-assist-extension3, message-security-assist-extension4,
- * reset-reference-bits-multiple, execution-hint, load-and-trap, miscellaneous-extensions,
- * processor-assist, dfp-zoned-conversion, enhanced-dat-2, load-and-zero-rightmost-byte,
- * load-store-on-cond-2, message-security-assist-extension5, dfp-packed-conversion,
- * miscellaneous-extensions-2, message-security-assist-extension7, message-security-assist-extension8,
- * vector-enhancements-1, vector-packed-decimal, insert-reference-bits-multiple,
- * miscellaneous-extensions-3, message-security-assist-extension9, vector-enhancements-2,
- * vector-packed-decimal-enhancement, enhanced-sort, deflate-conversion if they exist */
- if (TARGET_OPT_HTM)
- rust_add_target_info("target_feature", "transactional-execution");
- // TODO: ensure that "vector" only refers to code generation and not language exts and builtins
- if (TARGET_OPT_VX)
- rust_add_target_info("target_feature", "vector");
- // TODO: is guarded-storage the same thing as stack-guard? if so, add that option mapping
-}
diff --git a/gcc/config/sh/sh-rust.cc b/gcc/config/sh/sh-rust.cc
deleted file mode 100644
index bae718ddf95..00000000000
--- a/gcc/config/sh/sh-rust.cc
+++ /dev/null
@@ -1,163 +0,0 @@
-/* Subroutines for the Rust front end for the Renesas / SuperH SH architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for Renesas / SuperH SH targets. */
-
-void sh_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "sh");
-
- // llvm appears to have no (current or historical) support, so names made up by me
- // TODO: should arch be cumulative or exclusive? if cumulative, what is dependency of stuff like "e"?
- // TODO: maybe distinguish between just "sh4" and stuff like "sh4-200" and "sh4-300"?
- switch ((int)sh_cpu) {
- case PROCESSOR_SH1:
- rust_add_target_info("target_feature", "sh1");
- break;
- case PROCESSOR_SH2:
- rust_add_target_info("target_feature", "sh2");
- break;
- case PROCESSOR_SH2E:
- rust_add_target_info("target_feature", "sh2e");
- break;
- case PROCESSOR_SH2A:
- rust_add_target_info("target_feature", "sh2a");
- if (TARGET_SH2A_DOUBLE) {
- if (TARGET_FPU_SINGLE)
- rust_add_target_info("target_feature", "single");
- } else {
- if (TARGET_FPU_ANY)
- rust_add_target_info("target_feature", "single-only");
- else
- rust_add_target_info("target_feature", "nofpu");
- }
- break;
- case PROCESSOR_SH3:
- if (TARGET_HARD_SH4) {
- rust_add_target_info("target_feature", "sh4");
- rust_add_target_info("target_feature", "nofpu");
- } else {
- rust_add_target_info("target_feature", "sh3");
- }
- break;
- case PROCESSOR_SH3E:
- if (TARGET_HARD_SH4) {
- rust_add_target_info("target_feature", "sh4");
- rust_add_target_info("target_feature", "single-only");
- } else {
- rust_add_target_info("target_feature", "sh3e");
- }
- break;
- case PROCESSOR_SH4:
- rust_add_target_info("target_feature", "sh4");
- if (TARGET_FPU_SINGLE)
- rust_add_target_info("target_feature", "single");
- break;
- case PROCESSOR_SH4A:
- rust_add_target_info("target_feature", "sh4a");
- if (TARGET_SH4) {
- if (TARGET_FPU_SINGLE)
- rust_add_target_info("target_feature", "single");
- } else {
- if (TARGET_FPU_ANY)
- rust_add_target_info("target_feature", "single-only");
- else
- rust_add_target_info("target_feature", "nofpu");
- }
- break;
- default: // should this be an error?
- break;
- }
-
- if (TARGET_ACCUMULATE_OUTGOING_ARGS)
- rust_add_target_info("target_feature", "accumulate-outgoing-args");
- if (TARGET_LITTLE_ENDIAN)
- rust_add_target_info("target_feature", "l");
- else
- rust_add_target_info("target_feature", "b");
- if (TARGET_BIGTABLE)
- rust_add_target_info("target_feature", "bigtable");
- if (TARGET_BITOPS)
- rust_add_target_info("target_feature", "bitops");
- // TODO: determine way of having branch-cost, fixed-range, multcost, divsi3_libfunc as defines
- if (TARGET_ZDCBRANCH)
- rust_add_target_info("target_feature", "zdcbranch");
- if (TARGET_CBRANCH_FORCE_DELAY_SLOT)
- rust_add_target_info("target_feature", "cbranch-force-delay-slot");
- if (TARGET_ALIGN_DOUBLE)
- rust_add_target_info("target_feature", "dalign");
- if (TARGET_DIVIDE_CALL_DIV1)
- rust_add_target_info("target_feature", "div-call-div1");
- else if (TARGET_DIVIDE_CALL_FP)
- rust_add_target_info("target_feature", "div-call-fp");
- else if (TARGET_DIVIDE_CALL_TABLE)
- rust_add_target_info("target_feature", "div-call-table");
- if (TARGET_FDPIC)
- rust_add_target_info("target_feature", "fdpic");
- if (TARGET_FMOVD)
- rust_add_target_info("target_feature", "fmovd");
- if (TARGET_HITACHI) {
- rust_add_target_info("target_feature", "hitachi");
- rust_add_target_info("target_feature", "renesas");
- }
- if (TARGET_IEEE)
- rust_add_target_info("target_feature", "ieee");
- if (TARGET_INLINE_IC_INVALIDATE)
- rust_add_target_info("target_feature", "inline-ic_invalidate");
- if (TARGET_DUMPISIZE)
- rust_add_target_info("target_feature", "isize");
- if (TARGET_NOMACSAVE)
- rust_add_target_info("target_feature", "nomacsave");
- // ignoring padstruct as set to be removed
- if (TARGET_PREFERGOT)
- rust_add_target_info("target_feature", "prefergot");
- if (TARGET_RELAX)
- rust_add_target_info("target_feature", "relax");
- if (TARGET_ENABLE_TAS)
- rust_add_target_info("target_feature", "tas");
- if (TARGET_USERMODE)
- rust_add_target_info("target_feature", "usermode");
- if (TARGET_PRETEND_CMOVE)
- rust_add_target_info("target_feature", "pretend-cmove");
- if (TARGET_FSCA)
- rust_add_target_info("target_feature", "fsca");
- if (TARGET_FSRRA)
- rust_add_target_info("target_feature", "fsrra");
- if (sh_lra_flag)
- rust_add_target_info("target_feature", "lra");
-
- if (selected_atomic_model().type == sh_atomic_model::none)
- rust_add_target_info("target_feature", "atomic-model-none");
- if (TARGET_ATOMIC_SOFT_GUSA)
- rust_add_target_info("target_feature", "atomic-model-soft-gusa");
- if (TARGET_ATOMIC_SOFT_TCB)
- rust_add_target_info("target_feature", "atomic-model-soft-tcb");
- if (TARGET_ATOMIC_SOFT_IMASK)
- rust_add_target_info("target_feature", "atomic-model-soft-imask");
- if (TARGET_ATOMIC_HARD_LLCS)
- rust_add_target_info("target_feature", "atomic-model-hard-llcs");
- if (TARGET_ATOMIC_STRICT)
- rust_add_target_info("target_feature", "atomic-model-strict");
- // TODO: maybe have gbr-offset (from atomic-model) as define?
-}
diff --git a/gcc/config/sparc/sparc-rust.cc b/gcc/config/sparc/sparc-rust.cc
deleted file mode 100644
index 8921ba6376c..00000000000
--- a/gcc/config/sparc/sparc-rust.cc
+++ /dev/null
@@ -1,65 +0,0 @@
-/* Subroutines for the Rust front end for the SPARC architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "memmodel.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for SPARC targets. */
-
-void sparc_rust_target_cpu_info(void) {
- if (TARGET_64BIT)
- rust_add_target_info("target_arch", "sparc64");
- else
- rust_add_target_info("target_arch", "sparc");
-
- // names based on llvm
- /* TODO: try to isolate soft-mul-div feature (software emulation for integer multiply and divide)
- * if doable? does gcc even support this? */
- if (!(TARGET_FSMULD))
- rust_add_target_info("target_feature", "no-fsmuld");
- // TODO: add "no-fmuls" (fmuls instruction) option if can find in gcc
- if (TARGET_V9)
- rust_add_target_info("target_feature", "v9");
- if (TARGET_DEPRECATED_V8_INSNS)
- rust_add_target_info("target_feature", "deprecated-v8");
- if (TARGET_VIS)
- rust_add_target_info("target_feature", "vis");
- if (TARGET_VIS2)
- rust_add_target_info("target_feature", "vis2");
- if (TARGET_VIS3)
- rust_add_target_info("target_feature", "vis3");
- if (TARGET_LEON) // TODO: does this mean just leon or also allow leon v3?
- rust_add_target_info("target_feature", "leon");
- // TODO: add "leonpwrpsr" (PWRPSR instruction) option if can find in gcc
- if (TARGET_HARD_QUAD)
- rust_add_target_info("target_feature", "hard-quad-float");
- if (TARGET_POPC)
- rust_add_target_info("target_feature", "popc");
- if (!(TARGET_FPU))
- rust_add_target_info("target_feature", "soft-float");
- /* TODO: add "hasumacsmac" (UMAC and SMAC insns), "hasleoncasa" (CASA insns),
- * "insertnopload" (LEON3 fix), "detectroundchange" (LEON3 fix), "fixallfdivsqrt" (LEON fix),
- * "leoncyclecounter" if in gcc */
-
- // TODO: maybe add features in gcc that seem to have no llvm equivalent
-}
diff --git a/gcc/config/v850/v850-rust.cc b/gcc/config/v850/v850-rust.cc
deleted file mode 100644
index e676e384cdd..00000000000
--- a/gcc/config/v850/v850-rust.cc
+++ /dev/null
@@ -1,83 +0,0 @@
-/* Subroutines for the Rust front end for the NEC V850 architecture.
- Copyright (C) 2020-2022 Free Software Foundation, Inc.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tm_p.h"
-#include "rust/rust-target.h"
-#include "rust/rust-target-def.h"
-
-/* Implement TARGET_RUST_CPU_INFO for NEC V850 targets. */
-
-void v850_rust_target_cpu_info(void) {
- rust_add_target_info("target_arch", "v850");
-
- // appears to have no current or historical support in llvm, so names made up by me
- if (TARGET_APP_REGS)
- rust_add_target_info("target_feature", "app-regs");
- if (TARGET_BIG_SWITCH) {
- rust_add_target_info("target_feature", "big-switch");
- rust_add_target_info("target_feature", "long-jumps");
- }
- if (TARGET_DEBUG)
- rust_add_target_info("target_feature", "debug");
- if (TARGET_DISABLE_CALLT)
- rust_add_target_info("target_feature", "disable-callt");
- if (TARGET_EP)
- rust_add_target_info("target_feature", "ep");
- if (TARGET_LONG_CALLS)
- rust_add_target_info("target_feature", "long-calls");
- if (TARGET_PROLOG_FUNCTION)
- rust_add_target_info("target_feature", "prolog-function");
- // TODO: find if can get info from sda, zda and tda options
- if (TARGET_SMALL_SLD)
- rust_add_target_info("target_feature", "small-sld");
- if (TARGET_NO_STRICT_ALIGN)
- rust_add_target_info("target_feature", "no-strict-align");
- if (TARGET_JUMP_TABLES_IN_DATA_SECTION)
- rust_add_target_info("target_feature", "jump-tables-in-data-section");
- if (TARGET_US_BIT_SET)
- rust_add_target_info("target_feature", "US-bit-set");
- if (TARGET_V850)
- rust_add_target_info("target_feature", "v850");
- if (TARGET_V850E)
- rust_add_target_info("target_feature", "v850e");
- if (TARGET_V850E1)
- rust_add_target_info("target_feature", "v850e1");
- if (TARGET_V850E2)
- rust_add_target_info("target_feature", "v850e2");
- if (TARGET_V850E2V3)
- rust_add_target_info("target_feature", "v850e2v3");
- if (TARGET_V850E2V5) // TODO: how do i deal with V850E2V4 redirecting to this?
- rust_add_target_info("target_feature", "v850e2v5");
- if (TARGET_LOOP)
- rust_add_target_info("target_feature", "loop");
- if (TARGET_RELAX)
- rust_add_target_info("target_feature", "relax");
- if (TARGET_SOFT_FLOAT)
- rust_add_target_info("target_feature", "soft-float");
- else
- rust_add_target_info("target_feature", "hard-float");
- if (TARGET_GCC_ABI)
- rust_add_target_info("target_feature", "gcc-abi");
- else
- rust_add_target_info("target_feature", "rh850-abi");
- if (TARGET_8BYTE_ALIGN)
- rust_add_target_info("target_feature", "8byte-align");
-}
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2022-08-29 15:31 [gcc/devel/rust/master] Remove missed target hooks code Thomas Schwinge
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