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* [gcc(refs/users/meissner/heads/work099)] Revert patches.
@ 2022-09-02 22:12 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2022-09-02 22:12 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7b8fdcc5ed3289f0081b13c5553220d833ec8782
commit 7b8fdcc5ed3289f0081b13c5553220d833ec8782
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Sep 2 18:08:47 2022 -0400
Revert patches.
2022-09-02 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always use the
_Float128 type for __float128.
(rs6000_expand_builtin): Only change a KFmode built-in to TFmode, if the
built-in passes or returns TFmode. If the predicate failed because the
modes were different, use convert_move to load up the value instead of
copy_to_mode_reg.
* config/rs6000/rs6000.cc (rs6000_translate_mode_attribute): Don't
translate __float128 modes to long double modes (TFmode or TCmode).
(rs6000_libgcc_floating_mode_supported_p): Support KFmode all of the
time if we support IEEE 128-bit floating point.
(rs6000_floatn_mode): _Float128 and _Float128x always uses KFmode.
gcc/testsuite/
Revert patches.
* gcc.target/powerpc/float128-hw12.c: New test.
* gcc.target/powerpc/float128-hw13.c: Likewise.
* gcc.target/powerpc/float128-hw4.c: Update insns.
2022-09-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000.cc (init_float128_ieee): Use the correct
float_extend or float_truncate optab based on how the machine converts
between IEEE 128-bit and IBM 128-bit.
* config/rs6000/rs6000.md (IFKF): Delete.
(IFKF_reg): Delete.
(extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM
128-bit. Do not run if TFmode is IEEE 128-bit.
(extendifkf2): Delete.
(extendtfkf2): Delete.
(extendtfif2): Delete.
(trunciftf2): Delete.
(truncifkf2): Delete.
(trunckftf2): Delete.
(extendkftf2): Implement conversion of IEEE 128-bit types as a move.
(trunctfif2): Delete.
(trunctfkf2): Implement conversion of IEEE 128-bit types as a move.
(extend<mode>tf2_internal): Delete.
(extendtf<mode>2_internal): Delete.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 213 ++++++++++-------------
gcc/config/rs6000/rs6000.cc | 23 ++-
gcc/config/rs6000/rs6000.md | 177 ++++++++++++++-----
gcc/testsuite/gcc.target/powerpc/float128-hw12.c | 137 ---------------
gcc/testsuite/gcc.target/powerpc/float128-hw13.c | 137 ---------------
gcc/testsuite/gcc.target/powerpc/float128-hw4.c | 10 +-
6 files changed, 239 insertions(+), 458 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index cf3ce863c22..cc88b68ac47 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -733,15 +733,10 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- /* In the past we used long_double_type_node when long double was IEEE
- 128-bit. However, this means that the _Float128 type
- (i.e. float128_type_node) is a different type from __float128
- (i.e. ieee128_float_type_nonde). This leads to some corner cases,
- such as processing signaling NaNs with the nansf128 built-in function
- (which returns a _Float128 value) and assign it to a long double or
- __float128 value. The two explicit IEEE 128-bit types should always
- use the same internal type. */
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
@@ -3253,13 +3248,13 @@ htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode,
/* Expand an expression EXP that calls a built-in function,
with result going to TARGET if that's convenient
- (and in mode RETURN_MODE if that's convenient).
+ (and in mode MODE if that's convenient).
SUBTARGET may be used as the target for computing one of EXP's operands.
IGNORE is nonzero if the value is to be ignored.
Use the new builtin infrastructure. */
rtx
rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
- machine_mode return_mode, int ignore)
+ machine_mode /* mode */, int ignore)
{
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
enum rs6000_gen_builtins fcode
@@ -3267,99 +3262,78 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
- /* For 128-bit long double, we may need both the KFmode built-in functions
- and IFmode built-in functions to the equivalent TFmode built-in function,
- if either a TFmode result is expected or any of the arguments use
- TFmode. */
- if (TARGET_LONG_DOUBLE_128)
- {
- bool uses_tf_mode = return_mode == TFmode;
- if (!uses_tf_mode)
- {
- call_expr_arg_iterator iter;
- tree arg;
- FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
- {
- if (arg != error_mark_node
- && TYPE_MODE (TREE_TYPE (arg)) == TFmode)
- {
- uses_tf_mode = true;
- break;
- }
- }
- }
-
- /* Convert KFmode built-in functions to TFmode when long double is IEEE
- 128-bit. */
- if (uses_tf_mode && FLOAT128_IEEE_P (TFmode))
- switch (icode)
- {
- case CODE_FOR_sqrtkf2_odd:
- icode = CODE_FOR_sqrttf2_odd;
- break;
- case CODE_FOR_trunckfdf2_odd:
- icode = CODE_FOR_trunctfdf2_odd;
- break;
- case CODE_FOR_addkf3_odd:
- icode = CODE_FOR_addtf3_odd;
- break;
- case CODE_FOR_subkf3_odd:
- icode = CODE_FOR_subtf3_odd;
- break;
- case CODE_FOR_mulkf3_odd:
- icode = CODE_FOR_multf3_odd;
- break;
- case CODE_FOR_divkf3_odd:
- icode = CODE_FOR_divtf3_odd;
- break;
- case CODE_FOR_fmakf4_odd:
- icode = CODE_FOR_fmatf4_odd;
- break;
- case CODE_FOR_xsxexpqp_kf:
- icode = CODE_FOR_xsxexpqp_tf;
- break;
- case CODE_FOR_xsxsigqp_kf:
- icode = CODE_FOR_xsxsigqp_tf;
- break;
- case CODE_FOR_xststdcnegqp_kf:
- icode = CODE_FOR_xststdcnegqp_tf;
- break;
- case CODE_FOR_xsiexpqp_kf:
- icode = CODE_FOR_xsiexpqp_tf;
- break;
- case CODE_FOR_xsiexpqpf_kf:
- icode = CODE_FOR_xsiexpqpf_tf;
- break;
- case CODE_FOR_xststdcqp_kf:
- icode = CODE_FOR_xststdcqp_tf;
- break;
- case CODE_FOR_xscmpexpqp_eq_kf:
- icode = CODE_FOR_xscmpexpqp_eq_tf;
- break;
- case CODE_FOR_xscmpexpqp_lt_kf:
- icode = CODE_FOR_xscmpexpqp_lt_tf;
- break;
- case CODE_FOR_xscmpexpqp_gt_kf:
- icode = CODE_FOR_xscmpexpqp_gt_tf;
- break;
- case CODE_FOR_xscmpexpqp_unordered_kf:
- icode = CODE_FOR_xscmpexpqp_unordered_tf;
- break;
- default:
- break;
- }
-
- /* Convert IFmode built-in functions to TFmode when long double is IBM
- 128-bit. */
- else if (uses_tf_mode && FLOAT128_IBM_P (TFmode))
- {
- if (icode == CODE_FOR_packif)
- icode = CODE_FOR_packtf;
-
- else if (icode == CODE_FOR_unpackif)
- icode = CODE_FOR_unpacktf;
- }
- }
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
@@ -3482,6 +3456,18 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
{
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
}
/* TRUE iff the built-in function returns void. */
@@ -3636,24 +3622,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
for (int i = 0; i < nargs; i++)
if (!insn_data[icode].operand[i+k].predicate (op[i], mode[i+k]))
- {
- /* If the predicate failed because the modes are different, do a
- convert instead of copy_to_mode_reg, since copy_to_mode_reg will
- abort in this case. The modes might be different if we have two
- different 128-bit floating point modes (i.e. KFmode/TFmode if long
- double is IEEE 128-bit and IFmode/TFmode if long double is IBM
- 128-bit). */
- machine_mode mode_insn = mode[i+k];
- machine_mode mode_op = GET_MODE (op[i]);
- if (mode_insn != mode_op && mode_op != VOIDmode)
- {
- rtx tmp = gen_reg_rtx (mode_insn);
- convert_move (tmp, op[i], 0);
- op[i] = tmp;
- }
- else
- op[i] = copy_to_mode_reg (mode_insn, op[i]);
- }
+ op[i] = copy_to_mode_reg (mode[i+k], op[i]);
rtx pat;
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 2cee6522041..2cf9f27914a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10999,11 +10999,11 @@ init_float128_ieee (machine_mode mode)
set_conv_libfunc (trunc_optab, SFmode, mode, "__trunckfsf2");
set_conv_libfunc (trunc_optab, DFmode, mode, "__trunckfdf2");
- set_conv_libfunc (trunc_optab, mode, IFmode, "__trunctfkf2");
+ set_conv_libfunc (sext_optab, mode, IFmode, "__trunctfkf2");
if (mode != TFmode && FLOAT128_IBM_P (TFmode))
set_conv_libfunc (sext_optab, mode, TFmode, "__trunctfkf2");
- set_conv_libfunc (sext_optab, IFmode, mode, "__extendkftf2");
+ set_conv_libfunc (trunc_optab, IFmode, mode, "__extendkftf2");
if (mode != TFmode && FLOAT128_IBM_P (TFmode))
set_conv_libfunc (trunc_optab, TFmode, mode, "__extendkftf2");
@@ -23682,8 +23682,10 @@ rs6000_eh_return_filter_mode (void)
static machine_mode
rs6000_translate_mode_attribute (machine_mode mode)
{
- if (FLOAT128_IBM_P (mode)
- && ibm128_float_type_node == long_double_type_node)
+ if ((FLOAT128_IEEE_P (mode)
+ && ieee128_float_type_node == long_double_type_node)
+ || (FLOAT128_IBM_P (mode)
+ && ibm128_float_type_node == long_double_type_node))
return COMPLEX_MODE_P (mode) ? E_TCmode : E_TFmode;
return mode;
}
@@ -23722,10 +23724,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
- /* We only return true for KFmode if IEEE 128-bit types are
- supported. */
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23759,7 +23764,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23783,7 +23788,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ce4021009a3..a31673051f7 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
; Iterator for 128-bit VSX types for pack/unpack
(define_mode_iterator FMOVE128_VSX [V1TI KF])
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
; Whether a floating point move is ok, don't allow SD without hardware FP
(define_mode_attr fmove_ok [(SF "")
(DF "")
@@ -9094,63 +9100,106 @@
"xxlor %x0,%x1,%x2"
[(set_attr "type" "veclogical")])
-;; Float128 conversion functions. We only define the 'conversions' between two
-;; formats that use the same representation. We call the library function to
-;; convert between IEEE 128-bit and IBM 128-bit. We can't do these moves by
-;; using a SUBREG before register allocation. We set up the moves to prefer
-;; the output register being the same as the input register, which would enable
-;; the move to be deleted completely.
-(define_insn_and_split "extendkftf2"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
- (float_extend:TF (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
- "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (match_dup 2))]
+;; Float128 conversion functions. These expand to library function calls.
+;; We use expand to convert from IBM double double to IEEE 128-bit
+;; and trunc for the opposite.
+(define_expand "extendiftf2"
+ [(set (match_operand:TF 0 "gpc_reg_operand")
+ (float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
+ "TARGET_IBM128"
{
- operands[2] = gen_lowpart (TFmode, operands[1]);
-}
- [(set_attr "type" "veclogical")])
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
-(define_insn_and_split "trunctfkf2"
- [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
- (float_truncate:KF (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
- "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (match_dup 2))]
+(define_expand "extendifkf2"
+ [(set (match_operand:KF 0 "gpc_reg_operand")
+ (float_extend:KF (match_operand:IF 1 "gpc_reg_operand")))]
+ "TARGET_FLOAT128_TYPE"
{
- operands[2] = gen_lowpart (KFmode, operands[1]);
-}
- [(set_attr "type" "veclogical")])
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "extendtfkf2"
+ [(set (match_operand:KF 0 "gpc_reg_operand")
+ (float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
+ "TARGET_FLOAT128_TYPE"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "extendtfif2"
+ [(set (match_operand:IF 0 "gpc_reg_operand")
+ (float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
+ "TARGET_IBM128"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "trunciftf2"
+ [(set (match_operand:TF 0 "gpc_reg_operand")
+ (float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
+ "TARGET_IBM128"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "truncifkf2"
+ [(set (match_operand:KF 0 "gpc_reg_operand")
+ (float_truncate:KF (match_operand:IF 1 "gpc_reg_operand")))]
+ "TARGET_FLOAT128_TYPE"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "trunckftf2"
+ [(set (match_operand:TF 0 "gpc_reg_operand")
+ (float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
+ "TARGET_FLOAT128_TYPE"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
+
+(define_expand "trunctfif2"
+ [(set (match_operand:IF 0 "gpc_reg_operand")
+ (float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
+ "TARGET_IBM128"
+{
+ rs6000_expand_float128_convert (operands[0], operands[1], false);
+ DONE;
+})
-(define_insn_and_split "extendtfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand" "=wa,wa,r,r")
- (float_extend:IF (match_operand:TF 1 "gpc_reg_operand" "0,wa,0,r")))]
- "TARGET_HARD_FLOAT && TARGET_IBM128 && FLOAT128_IBM_P (TFmode)"
+(define_insn_and_split "*extend<mode>tf2_internal"
+ [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
+ (float_extend:TF
+ (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
- [(set (match_dup 0)
- (match_dup 2))]
+ [(set (match_dup 0) (match_dup 2))]
{
- operands[2] = gen_lowpart (IFmode, operands[1]);
-}
- [(set_attr "num_insns" "2")
- (set_attr "length" "8")])(define_insn_and_split "extendiftf2"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa,r,r")
- (float_extend:TF (match_operand:IF 1 "gpc_reg_operand" "0,wa,0,r")))]
- "TARGET_HARD_FLOAT && TARGET_IBM128 && FLOAT128_IBM_P (TFmode)"
+ operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
+})
+
+(define_insn_and_split "*extendtf<mode>2_internal"
+ [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+ (float_extend:IFKF
+ (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
- [(set (match_dup 0)
- (match_dup 2))]
+ [(set (match_dup 0) (match_dup 2))]
{
- operands[2] = gen_lowpart (TFmode, operands[1]);
-}
- [(set_attr "num_insns" "2")
- (set_attr "length" "8")])
+ operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
\f
;; Reload helper functions used by rs6000_secondary_reload. The patterns all
@@ -14878,6 +14927,40 @@
[(set_attr "type" "vecfloat")
(set_attr "size" "128")])
+;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
+;; point is a simple copy.
+(define_insn_and_split "extendkftf2"
+ [(set (match_operand:TF 0 "vsx_register_operand" "=wa,?wa")
+ (float_extend:TF (match_operand:KF 1 "vsx_register_operand" "0,wa")))]
+ "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+ "@
+ #
+ xxlor %x0,%x1,%x1"
+ "&& reload_completed && REGNO (operands[0]) == REGNO (operands[1])"
+ [(const_int 0)]
+{
+ emit_note (NOTE_INSN_DELETED);
+ DONE;
+}
+ [(set_attr "type" "*,veclogical")
+ (set_attr "length" "0,4")])
+
+(define_insn_and_split "trunctfkf2"
+ [(set (match_operand:KF 0 "vsx_register_operand" "=wa,?wa")
+ (float_extend:KF (match_operand:TF 1 "vsx_register_operand" "0,wa")))]
+ "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+ "@
+ #
+ xxlor %x0,%x1,%x1"
+ "&& reload_completed && REGNO (operands[0]) == REGNO (operands[1])"
+ [(const_int 0)]
+{
+ emit_note (NOTE_INSN_DELETED);
+ DONE;
+}
+ [(set_attr "type" "*,veclogical")
+ (set_attr "length" "0,4")])
+
(define_insn "trunc<mode>df2_hw"
[(set (match_operand:DF 0 "altivec_register_operand" "=v")
(float_truncate:DF
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw12.c b/gcc/testsuite/gcc.target/powerpc/float128-hw12.c
deleted file mode 100644
index d08b4cbc883..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/float128-hw12.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/* { dg-do compile { target lp64 } } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
-/* { dg-require-effective-target float128 } */
-/* { dg-options "-mpower9-vector -O2 -mabi=ieeelongdouble -Wno-psabi" } */
-
-/* Insure that the ISA 3.0 IEEE 128-bit floating point built-in functions work
- with _Float128. This is the same as float128-hw4.c, except the type
- _Float128 is used, and the IEEE 128-bit long double ABI is used. */
-
-#ifndef TYPE
-#define TYPE _Float128
-#endif
-
-unsigned int
-get_double_exponent (double a)
-{
- return __builtin_vec_scalar_extract_exp (a);
-}
-
-unsigned int
-get_float128_exponent (TYPE a)
-{
- return __builtin_vec_scalar_extract_exp (a);
-}
-
-unsigned long
-get_double_mantissa (double a)
-{
- return __builtin_vec_scalar_extract_sig (a);
-}
-
-__uint128_t
-get_float128_mantissa (TYPE a)
-{
- return __builtin_vec_scalar_extract_sig (a);
-}
-
-double
-set_double_exponent_ulong (unsigned long a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-set_float128_exponent_uint128 (__uint128_t a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-double
-set_double_exponent_double (double a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-set_float128_exponent_float128 (TYPE a, __uint128_t e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-sqrt_odd (TYPE a)
-{
- return __builtin_sqrtf128_round_to_odd (a);
-}
-
-double
-trunc_odd (TYPE a)
-{
- return __builtin_truncf128_round_to_odd (a);
-}
-
-TYPE
-add_odd (TYPE a, TYPE b)
-{
- return __builtin_addf128_round_to_odd (a, b);
-}
-
-TYPE
-sub_odd (TYPE a, TYPE b)
-{
- return __builtin_subf128_round_to_odd (a, b);
-}
-
-TYPE
-mul_odd (TYPE a, TYPE b)
-{
- return __builtin_mulf128_round_to_odd (a, b);
-}
-
-TYPE
-div_odd (TYPE a, TYPE b)
-{
- return __builtin_divf128_round_to_odd (a, b);
-}
-
-TYPE
-fma_odd (TYPE a, TYPE b, TYPE c)
-{
- return __builtin_fmaf128_round_to_odd (a, b, c);
-}
-
-TYPE
-fms_odd (TYPE a, TYPE b, TYPE c)
-{
- return __builtin_fmaf128_round_to_odd (a, b, -c);
-}
-
-TYPE
-nfma_odd (TYPE a, TYPE b, TYPE c)
-{
- return -__builtin_fmaf128_round_to_odd (a, b, c);
-}
-
-TYPE
-nfms_odd (TYPE a, TYPE b, TYPE c)
-{
- return -__builtin_fmaf128_round_to_odd (a, b, -c);
-}
-
-/* { dg-final { scan-assembler {\mxsiexpdp\M} } } */
-/* { dg-final { scan-assembler {\mxsiexpqp\M} } } */
-/* { dg-final { scan-assembler {\mxsxexpdp\M} } } */
-/* { dg-final { scan-assembler {\mxsxexpqp\M} } } */
-/* { dg-final { scan-assembler {\mxsxsigdp\M} } } */
-/* { dg-final { scan-assembler {\mxsxsigqp\M} } } */
-/* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
-/* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
-/* { dg-final { scan-assembler {\mxssubqpo\M} } } */
-/* { dg-final { scan-assembler-not {\mbl\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw13.c b/gcc/testsuite/gcc.target/powerpc/float128-hw13.c
deleted file mode 100644
index 51a3cd4802b..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/float128-hw13.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/* { dg-do compile { target lp64 } } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
-/* { dg-require-effective-target float128 } */
-/* { dg-options "-mpower9-vector -O2 -mabi=ibmlongdouble -Wno-psabi" } */
-
-/* Insure that the ISA 3.0 IEEE 128-bit floating point built-in functions work
- with __float128. This is the same as float128-hw4.c, except the type
- __float128 is used, and the IBM 128-bit long double ABI is used. */
-
-#ifndef TYPE
-#define TYPE __float128
-#endif
-
-unsigned int
-get_double_exponent (double a)
-{
- return __builtin_vec_scalar_extract_exp (a);
-}
-
-unsigned int
-get_float128_exponent (TYPE a)
-{
- return __builtin_vec_scalar_extract_exp (a);
-}
-
-unsigned long
-get_double_mantissa (double a)
-{
- return __builtin_vec_scalar_extract_sig (a);
-}
-
-__uint128_t
-get_float128_mantissa (TYPE a)
-{
- return __builtin_vec_scalar_extract_sig (a);
-}
-
-double
-set_double_exponent_ulong (unsigned long a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-set_float128_exponent_uint128 (__uint128_t a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-double
-set_double_exponent_double (double a, unsigned long e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-set_float128_exponent_float128 (TYPE a, __uint128_t e)
-{
- return __builtin_vec_scalar_insert_exp (a, e);
-}
-
-TYPE
-sqrt_odd (TYPE a)
-{
- return __builtin_sqrtf128_round_to_odd (a);
-}
-
-double
-trunc_odd (TYPE a)
-{
- return __builtin_truncf128_round_to_odd (a);
-}
-
-TYPE
-add_odd (TYPE a, TYPE b)
-{
- return __builtin_addf128_round_to_odd (a, b);
-}
-
-TYPE
-sub_odd (TYPE a, TYPE b)
-{
- return __builtin_subf128_round_to_odd (a, b);
-}
-
-TYPE
-mul_odd (TYPE a, TYPE b)
-{
- return __builtin_mulf128_round_to_odd (a, b);
-}
-
-TYPE
-div_odd (TYPE a, TYPE b)
-{
- return __builtin_divf128_round_to_odd (a, b);
-}
-
-TYPE
-fma_odd (TYPE a, TYPE b, TYPE c)
-{
- return __builtin_fmaf128_round_to_odd (a, b, c);
-}
-
-TYPE
-fms_odd (TYPE a, TYPE b, TYPE c)
-{
- return __builtin_fmaf128_round_to_odd (a, b, -c);
-}
-
-TYPE
-nfma_odd (TYPE a, TYPE b, TYPE c)
-{
- return -__builtin_fmaf128_round_to_odd (a, b, c);
-}
-
-TYPE
-nfms_odd (TYPE a, TYPE b, TYPE c)
-{
- return -__builtin_fmaf128_round_to_odd (a, b, -c);
-}
-
-/* { dg-final { scan-assembler {\mxsiexpdp\M} } } */
-/* { dg-final { scan-assembler {\mxsiexpqp\M} } } */
-/* { dg-final { scan-assembler {\mxsxexpdp\M} } } */
-/* { dg-final { scan-assembler {\mxsxexpqp\M} } } */
-/* { dg-final { scan-assembler {\mxsxsigdp\M} } } */
-/* { dg-final { scan-assembler {\mxsxsigqp\M} } } */
-/* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
-/* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
-/* { dg-final { scan-assembler {\mxssubqpo\M} } } */
-/* { dg-final { scan-assembler-not {\mbl\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw4.c b/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
index 3f6717825b7..fc149169bc6 100644
--- a/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
+++ b/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
@@ -118,11 +118,6 @@ nfms_odd (TYPE a, TYPE b, TYPE c)
return -__builtin_fmaf128_round_to_odd (a, b, -c);
}
-/* In using long double instead of _Float128, we might not be able to optimize
- __builtin_fmaf128_round_to_odd (a, b, -c) into using xsmsubqpo instead of
- xsnegqp and xsmaddqpo due to conversions between TFmode and KFmode. So just
- recognize that the did the FMA optimization. */
-
/* { dg-final { scan-assembler {\mxsiexpdp\M} } } */
/* { dg-final { scan-assembler {\mxsiexpqp\M} } } */
/* { dg-final { scan-assembler {\mxsxexpdp\M} } } */
@@ -131,8 +126,11 @@ nfms_odd (TYPE a, TYPE b, TYPE c)
/* { dg-final { scan-assembler {\mxsxsigqp\M} } } */
/* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
/* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
-/* { dg-final { scan-assembler {\mxsn?m(add|sub)qpo\M} } } */
+/* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
+/* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
/* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
+/* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
+/* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
/* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
/* { dg-final { scan-assembler {\mxssubqpo\M} } } */
/* { dg-final { scan-assembler-not {\mbl\M} } } */
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2022-09-02 22:12 [gcc(refs/users/meissner/heads/work099)] Revert patches Michael Meissner
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