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* [gcc r13-2832] Fix typo in chapter level for RISC-V attributes
@ 2022-09-25  7:32 Torbjorn Svensson
  0 siblings, 0 replies; only message in thread
From: Torbjorn Svensson @ 2022-09-25  7:32 UTC (permalink / raw)
  To: gcc-cvs

commit r13-2832-g323c38c915f34883439e9e53b9eac5fe07cb8378
Author: Torbjörn SVENSSON <>
Date:   Fri Sep 23 20:38:45 2022 +0200

    Fix typo in chapter level for RISC-V attributes
    The "RISC-V specific attributes" section should be at the same level
    as "PowerPC-specific attributes".
            * doc/sourcebuild.texi: Fix chapter level.
    Signed-off-by: Torbjörn SVENSSON  <>

 gcc/doc/sourcebuild.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 760ff9559a6..52357cc7aee 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2447,7 +2447,7 @@ PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu}
 setting is Power9 or later.
 @end table
-@subsection RISC-V specific attributes
+@subsubsection RISC-V specific attributes
 @table @code

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