public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/dmf001)] Change mma_fpr to not_dmf.
Date: Sat, 15 Oct 2022 00:01:39 +0000 (GMT) [thread overview]
Message-ID: <20221015000139.BF4F03858D38@sourceware.org> (raw)
https://gcc.gnu.org/g:3d76ee15bfe1a27364e60ead6205218ec3a307f4
commit 3d76ee15bfe1a27364e60ead6205218ec3a307f4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Oct 14 20:00:16 2022 -0400
Change mma_fpr to not_dmf.
2022-10-14 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/mma.md (mma_<vv>): Use isa attribute 'not_dmf' instead
of 'mma_fpr'.
(mma_<avv>): Likewise.
(mma_<pv>): Likewise.
(mma_<apv>): Likewise.
(mma_<vvi4i4i8>): Likewise.
(mma_<avvi4i4i8>): Likewise.
(mma_<vvi4i4i2>): Likewise.
(mma_<avvi4i4i2>): Likewise.
(mma_<vvi4i4>): Likewise.
(mma_<avvi4i4>): Likewise.
(mma_<pvi4i2>): Likewise.
(mma_<apvi4i2>): Likewise.
(mma_<vvi4i4i4>"): Likewise.
(mma_<avvi4i4i4>): Likewise.
* config/rs6000/rs6000.md (isa attribute): Rename mma_fpr to not_dmf.
(enabled attribute): Likewise.
Diff:
---
gcc/config/rs6000/mma.md | 29 +++++++++++++++--------------
gcc/config/rs6000/rs6000.md | 8 +++-----
2 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index c0ac6addac9..812ecc2671f 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -614,7 +614,7 @@
"TARGET_MMA"
"<vv> %A0,%x1,%x2"
[(set_attr "type" "mma")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<avv>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -625,7 +625,7 @@
"TARGET_MMA"
"<avv> %A0,%x2,%x3"
[(set_attr "type" "mma")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<pv>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -635,7 +635,7 @@
"TARGET_MMA"
"<pv> %A0,%x1,%x2"
[(set_attr "type" "mma")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<apv>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -646,7 +646,7 @@
"TARGET_MMA"
"<apv> %A0,%x2,%x3"
[(set_attr "type" "mma")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<vvi4i4i8>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -659,7 +659,8 @@
"TARGET_MMA"
"<vvi4i4i8> %A0,%x1,%x2,%3,%4,%5"
[(set_attr "type" "mma")
- (set_attr "prefixed" "yes")])
+ (set_attr "prefixed" "yes")
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<avvi4i4i8>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -674,7 +675,7 @@
"<avvi4i4i8> %A0,%x2,%x3,%4,%5,%6"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<vvi4i4i2>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -688,7 +689,7 @@
"<vvi4i4i2> %A0,%x1,%x2,%3,%4,%5"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<avvi4i4i2>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -703,7 +704,7 @@
"<avvi4i4i2> %A0,%x2,%x3,%4,%5,%6"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<vvi4i4>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -716,7 +717,7 @@
"<vvi4i4> %A0,%x1,%x2,%3,%4"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<avvi4i4>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -730,7 +731,7 @@
"<avvi4i4> %A0,%x2,%x3,%4,%5"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<pvi4i2>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -743,7 +744,7 @@
"<pvi4i2> %A0,%x1,%x2,%3,%4"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<apvi4i2>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -757,7 +758,7 @@
"<apvi4i2> %A0,%x2,%x3,%4,%5"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<vvi4i4i4>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -771,7 +772,7 @@
"<vvi4i4i4> %A0,%x1,%x2,%3,%4,%5"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
(define_insn "mma_<avvi4i4i4>"
[(set (match_operand:XO 0 "accumulator_operand" "=wD,&d,&d")
@@ -786,4 +787,4 @@
"<avvi4i4i4> %A0,%x2,%x3,%4,%5,%6"
[(set_attr "type" "mma")
(set_attr "prefixed" "yes")
- (set_attr "isa" "dmf,mma_fpr,mma_fpr")])
+ (set_attr "isa" "dmf,not_dmf,not_dmf")])
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 287ddd16ecd..fdf8ab9e2df 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -356,7 +356,7 @@
(const (symbol_ref "(enum attr_cpu) rs6000_tune")))
;; The ISA we implement.
-(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10,dmf,mma_fpr"
+(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9,p9v,p9kf,p9tf,p10,dmf,not_dmf"
(const_string "any"))
;; Is this alternative enabled for the current CPU/ISA/etc.?
@@ -409,10 +409,8 @@
(match_test "TARGET_DMF"))
(const_int 1)
- ;; mma_fpr is for use on power10 systems where the accumulators overlap
- ;; with the FPR registers.
- (and (eq_attr "isa" "mma_fpr")
- (match_test "TARGET_MMA && !TARGET_DMF"))
+ (and (eq_attr "isa" "not_dmf")
+ (match_test "!TARGET_DMF"))
(const_int 1)
] (const_int 0)))
reply other threads:[~2022-10-15 0:01 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221015000139.BF4F03858D38@sourceware.org \
--to=meissner@gcc.gnu.org \
--cc=gcc-cvs@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).