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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/dmf001)] Revert patch. Date: Wed, 19 Oct 2022 03:51:13 +0000 (GMT) [thread overview] Message-ID: <20221019035113.0D9813858D32@sourceware.org> (raw) https://gcc.gnu.org/g:5828134cccba61a2b79684ad333cea2eb54baddf commit 5828134cccba61a2b79684ad333cea2eb54baddf Author: Michael Meissner <meissner@linux.ibm.com> Date: Tue Oct 18 23:50:37 2022 -0400 Revert patch. 2022-10-18 Michael Meissner <meissner@linux.ibm.com> gcc/ Revert patch. * config/rs6000/rs6000.cc (rs6000_memory_move_cost): Tweak last change. (rs6000_debugger_regno): Add support for DMF registers. Diff: --- gcc/config/rs6000/rs6000.cc | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 9b9fa75d8ba..9d5d1ce1930 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -22724,8 +22724,7 @@ rs6000_memory_move_cost (machine_mode mode, reg_class_t rclass, else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS)) ret = 4 * hard_regno_nregs (FIRST_ALTIVEC_REGNO, mode); else if (reg_classes_intersect_p (rclass, DMF_REGS)) - ret = (rs6000_dmf_register_move_cost (mode, VSX_REGS) - + rs6000_memory_move_cost (mode, VSX_REGS, false)); + ret = 4 + rs6000_register_move_cost (mode, rclass, VSX_REGS); else ret = 4 + rs6000_register_move_cost (mode, rclass, GENERAL_REGS); @@ -24100,10 +24099,6 @@ rs6000_debugger_regno (unsigned int regno, unsigned int format) return 67; if (regno == 64) return 64; - /* XXX: This is a guess. The GCC register number for FIRST_DMF_REGNO is 111, - but the frame pointer regnum above uses that. */ - if (DMF_REGNO_P (regno)) - return regno - FIRST_DMF_REGNO + 112; gcc_unreachable (); }
next reply other threads:[~2022-10-19 3:51 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-10-19 3:51 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2022-10-20 4:14 Michael Meissner 2022-10-14 18:23 Michael Meissner
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