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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/dmf002)] Update ChangeLog.meissner.
Date: Thu, 27 Oct 2022 04:00:34 +0000 (GMT)	[thread overview]
Message-ID: <20221027040034.C63B1382A2E8@sourceware.org> (raw)

https://gcc.gnu.org/g:d2565968c6b33085aa7ad67871977a71be41e1be

commit d2565968c6b33085aa7ad67871977a71be41e1be
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 27 00:00:20 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-26   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d6d53f6ac60..a34e7c9446b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,88 @@
+==================== Dmf002, patch002.
+
+Add support for accumulators in DMR registers.
+
+2022-10-26   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md (wD constraint): New constraint.
+	* config/rs6000/mma.md (UNSPEC_DM_ASSEMBLE_ACC): New unspec.
+	(movxo): Convert into define_expand.
+	(movxo_p10): Power10 version of movxo.
+	(movxo_dm): Dense math version of movxo.
+	(mma_assemble_acc): Add dense match support to define_expand.
+	(mma_assemble_acc_p10): Rename from mma_assemble_acc, and restrict it to
+	non dense math.
+	(mma_assemble_acc_dm): Dense math version of mma_assemble_acc.
+	(mma_disassemble_acc): Add dense math support to define_expand.
+	(mma_disassemble_acc_p10): Rename from mma_disassemble_acc, and restrict
+	it to non dense math.
+	(mma_disassemble_acc_dm): Dense math version of mma_disassemble_acc.
+	(mma_<acc>): New define_expand to handle mma_<acc> for dense math and
+	non dense math.
+	(mma_<acc> insn): Restrict to non dense math.
+	(mma_xxsetaccz): Convert to define_expand to handle non dense math and
+	dense math.
+	(mma_xxsetaccz_p10): Rename from mma_xxsetaccz and restrict usage to non
+	dense math.
+	(mma_xxsetaccz_dm): Dense math version of mma_xxsetaccz.
+	(mma_<vv>): Add support for dense math.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/predicates.md (dmr_operand): New predicate.
+	(accumulator_operand): Likewise.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add -mdense-math.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
+	(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
+	(LAST_RELOAD_REG_CLASS): Add support for DMR registers.
+	(reload_reg_map): Likewise.
+	(rs6000_reg_names): Likewise.
+	(alt_reg_names): Likewise.
+	(rs6000_hard_regno_nregs_internal): Likewise.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Likewise.
+	(rs6000_option_override_internal): Add checking for -mdense-math.
+	(rs6000_secondary_reload_memory): Add support for DMR registers.
+	(rs6000_secondary_reload_simple_move): Likewise.
+	(rs6000_preferred_reload_class): Likewise.
+	(rs6000_secondary_reload_class): Likewise.
+	(print_operand): Make %A handle both FPRs and DMRs.
+	(rs6000_dmr_register_move_cost): New helper function.
+	(rs6000_register_move_cost): Add support for DMR registers.
+	(rs6000_memory_move_cost): Likewise.
+	(rs6000_compute_pressure_classes): Likewise.
+	(rs6000_debugger_regno): Likewise.
+	(rs6000_opt_masks): Add -mdense-math.
+	(rs6000_split_multireg_move): Add support for DMRs.
+	* config/rs6000/rs6000.h (UNITS_PER_DMR_WORD): New macro.
+	(FIRST_PSEUDO_REGISTER): Update for DMRs.
+	(FIXED_REGISTERS): Add DMRs.
+	(CALL_REALLY_USED_REGISTERS): Likewise.
+	(REG_ALLOC_ORDER): Likewise.
+	(enum reg_class): Add DM_REGS.
+	(REG_CLASS_NAMES): Likewise.
+	(REG_CLASS_CONTENTS): Likewise.
+	* config/rs6000/rs6000.md (FIRST_DMR_REGNO): New constant.
+	(LAST_DMR_REGNO): Likewise.
+	(isa attribute): Add 'dm' and 'not_dm' attributes.
+	(enabled attribute): Support 'dm' and 'not_dm' attributes.
+	* config/rs6000/rs6000.opt (-mdense-math): New switch.
+
 ==================== Dmf002, patch001.
 
 Add -mcpu=future.

             reply	other threads:[~2022-10-27  4:00 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27  4:00 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-11-03  2:14 Michael Meissner
2022-10-27  5:10 Michael Meissner
2022-10-27  4:45 Michael Meissner
2022-10-27  4:07 Michael Meissner
2022-10-26 20:58 Michael Meissner

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