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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/dmf002)] Update ChangeLog.meissner.
Date: Thu, 27 Oct 2022 05:10:07 +0000 (GMT)	[thread overview]
Message-ID: <20221027051007.051F03858011@sourceware.org> (raw)

https://gcc.gnu.org/g:4746170d9175a271f0684ca428c62c4779762258

commit 4746170d9175a271f0684ca428c62c4779762258
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 27 01:09:50 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-27   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 92cbc846671..f131db29c46 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,21 @@
+==================== Dmf002, patch005.
+
+Add LAGEN and PLAGEN support.
+
+2022-10-27   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add -mlagen.
+	* config/rs6000/rs6000.cc (rs6000_file_start): Add macros for fake lagen
+	and plagen instructions.
+	(rs6000_opt_masks): Add -mlagen.
+	* config/rs6000/rs6000.md (lagendi3): New insn for -mlagen.
+	(plagendi3_nora): Likewise.
+	(plagendi3): Likewise.
+	(plagendi3_noshift): Likewise.
+	* config/rs6000/rs6000.opt (-mlagen): New option.
+
 ==================== Dmf002, patch004.
 
 Add support for 1,024 bit DMR registers.

             reply	other threads:[~2022-10-27  5:10 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27  5:10 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-11-03  2:14 Michael Meissner
2022-10-27  4:45 Michael Meissner
2022-10-27  4:07 Michael Meissner
2022-10-27  4:00 Michael Meissner
2022-10-26 20:58 Michael Meissner

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