[gcc(refs/users/meissner/heads/dmf003)] Fix typos.

[gcc(refs/users/meissner/heads/dmf003)] Fix typos.

[Michael Meissner]

https://gcc.gnu.org/g:b89c4d3ed29839f160f333bea733427e17b4e658

commit b89c4d3ed29839f160f333bea733427e17b4e658
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 4 13:07:29 2022 -0400

    Fix typos.
    
    2022-11-04   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/mma.md (movxo_dm): Fix typos.
            (mma_assemble_acc_dm): Likewise.
            (mma_disassemble_acc_dm): Likewise.
            (movtdo_insert512_upper): Likewise.
            (movtdo_insert512_lower): Likewise.
            (movtdo_extract512): Likewise.

Diff:
---
 gcc/config/rs6000/mma.md | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 32b93e89e2e..94eae9dbcd0 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -408,9 +408,9 @@
    #
    #
    #
-   dmxxinstdmr512 %0,%1,%Y1,0
-   dmmr %0,%1
-   dmxxextfdmr512 %0,%Y0,%1,0"
+   dmxxinstdmr512 %A0,%1,%Y1,0
+   dmmr %A0,%A1
+   dmxxextfdmr512 %0,%Y0,%A1,0"
   "&& reload_completed
    && !dmr_operand (operands[0], XOmode)
    && !dmr_operand (operands[1], XOmode)"
@@ -552,7 +552,7 @@
 		   (match_operand:OO 2 "vsx_register_operand" "wa")]
 		  UNSPEC_DM_ASSEMBLE_ACC))]
  "TARGET_MMA && TARGET_DENSE_MATH"
- "dmxxinsfdmr512 %0,%1,%2,0"
+ "dmxxinstdmr512 %A0,%1,%2,0"
  [(set_attr "type" "mma")])
 
 (define_expand "mma_disassemble_acc"
@@ -585,7 +585,7 @@
 		       (match_operand 2 "const_0_to_3_operand")]
 		      UNSPEC_MMA_EXTRACT))]
   "TARGET_DENSE_MATH"
-  "dmxxextfdmr256 %0,%1,2"
+  "dmxxextfdmr256 %0,%A1,%2"
   [(set_attr "type" "mma")])
 
 ;; MMA instructions that do not use their accumulators as an input, still must
@@ -940,7 +940,7 @@
 	(unspec:TDO [(match_operand:XO 1 "vsx_register_operand" "wa")]
 		    UNSPEC_DM_INSERT512_UPPER))]
   "TARGET_DENSE_MATH"
-  "dmxxinstdmr512 %0,%1,%Y1,0"
+  "dmxxinstdmr512 %A0,%1,%Y1,0"
   [(set_attr "type" "mma")])
 
 (define_insn "movtdo_insert512_lower"
@@ -949,7 +949,7 @@
 		     (match_operand:XO 2 "vsx_register_operand" "wa")]
 		    UNSPEC_DM_INSERT512_LOWER))]
   "TARGET_DENSE_MATH"
-  "dmxxinstdmr512 %0,%2,%Y2,1"
+  "dmxxinstdmr512 %A0,%2,%Y2,1"
   [(set_attr "type" "mma")])
 
 ;; Move from DMR registers to VSX registers via two extract 512 bit
@@ -960,7 +960,7 @@
 		    (match_operand 2 "const_0_to_1_operand" "n")]
 		   UNSPEC_DM_EXTRACT512))]
   "TARGET_DENSE_MATH"
-  "dmxxextfdmr512 %0,%Y0,%1,%2"
+  "dmxxextfdmr512 %0,%Y0,%A1,%2"
   [(set_attr "type" "mma")])
 
 ;; Reload DMR registers from memory