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* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-15 14:02 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-15 14:02 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:8dbcea61dfaa9ad0db6d77a1ff2b9bb5fc4d145c

commit 8dbcea61dfaa9ad0db6d77a1ff2b9bb5fc4d145c
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index ee980714a24..14e3346797f 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-12-01 13:24 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-12-01 13:24 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:de66611c70ca9f2ab5e5357b3e8d5c60c9358e9e

commit de66611c70ca9f2ab5e5357b3e8d5c60c9358e9e
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c487524fc89..fe713882ef1 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-18 20:26 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-18 20:26 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:d7378acd99c8b293b80f8484a3f4bf4854a8f56d

commit d7378acd99c8b293b80f8484a3f4bf4854a8f56d
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c487524fc89..fe713882ef1 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-18 20:23 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-18 20:23 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:74922e227e22a451c2ddcd9abf5b7fb4f16da2a5

commit 74922e227e22a451c2ddcd9abf5b7fb4f16da2a5
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c487524fc89..fe713882ef1 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-18 11:36 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-18 11:36 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:00cd924397193749c21b1fb839f446d3f7d97127

commit 00cd924397193749c21b1fb839f446d3f7d97127
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c487524fc89..fe713882ef1 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-17 22:26 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-17 22:26 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:c0034ca89fa5a35fb5a74b6ff5b770ef39fd0e70

commit c0034ca89fa5a35fb5a74b6ff5b770ef39fd0e70
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index a06b381f42a..4c7649a8cbf 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [gcc(refs/vendors/vrull/heads/for-upstream)] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
@ 2022-11-15 15:00 Philipp Tomsich
  0 siblings, 0 replies; 7+ messages in thread
From: Philipp Tomsich @ 2022-11-15 15:00 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:1490405e21e128e6dc7dbce00f52b8428c130093

commit 1490405e21e128e6dc7dbce00f52b8428c130093
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Sep 28 11:18:58 2022 +0200

    riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
    
    INSNs are usually postfixed by a number representing the argument count.
    Given the instructions will be used in a later commit, let's make them
    visible, but add a "riscv_" prefix to avoid conflicts with standard
    INSNs.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (*<optab>_not<mode>): Rename INSN.
            (riscv_<optab>_not<mode>3): Rename INSN.
            (*xor_not<mode>): Rename INSN.
            (xor_not<mode>3): Rename INSN.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/bitmanip.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index ee980714a240..14e3346797f2 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -238,7 +238,7 @@
 
 ;; ZBB extension.
 
-(define_insn "*<optab>_not<mode>"
+(define_insn "riscv_<optab>_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_bitwise:X (not:X (match_operand:X 1 "register_operand" "r"))
                             (match_operand:X 2 "register_operand" "r")))]
@@ -260,7 +260,7 @@
   [(set (match_dup 3) (ashiftrt:DI (match_dup 1) (const_int 63)))
    (set (match_dup 0) (and:DI (not:DI (match_dup 3)) (match_dup 2)))])
 
-(define_insn "*xor_not<mode>"
+(define_insn "riscv_xor_not<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (not:X (xor:X (match_operand:X 1 "register_operand" "r")
                       (match_operand:X 2 "register_operand" "r"))))]

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2022-12-01 13:24 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2022-11-15 15:00 Philipp Tomsich
2022-11-17 22:26 Philipp Tomsich
2022-11-18 11:36 Philipp Tomsich
2022-11-18 20:23 Philipp Tomsich
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