[gcc/vrull/heads/for-upstream] (101 commits) riscv: Add support for strlen inline expansion

[gcc/vrull/heads/for-upstream] (101 commits) riscv: Add support for strlen inline expansion

[Philipp Tomsich]

The branch 'vrull/heads/for-upstream' was updated to point to:

 4c96c29290b... riscv: Add support for strlen inline expansion

It previously pointed to:

 50881951576... riscv: Add support for strlen inline expansion

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
-------------------------------------------------------------------

  5088195... riscv: Add support for strlen inline expansion
  a0a82c7... riscv: Use by-pieces to do overlapping accesses in block_mo
  bd76c16... riscv: Move riscv_block_move_loop to separate file
  1ab285c... riscv: Enable overlap-by-pieces via tune param
  1490405... riscv: bitmanip/zbb: Add prefix/postfix and enable visiblit
  b09a434... RISC-V: Handle "(a & twobits) == singlebit" in branches usi
  0a90878... RISC-V: Split "(a & (1UL << bitno)) ? 0 : 1" to bext + xori
  60e9ac0... RISC-V: Split "(a & (1UL << bitno)) ? 0 : -1" to bext + add
  11a36c1... RISC-V: Zihintpause: add __builtin_riscv_pause
  4c3df1e... RISC-V: Use .p2align for code-alignment
  7ff40c1... ifcvt: add if-conversion to conditional-zero instructions
  21cbb5b... RISC-V: Ventana-VT1 supports XVentanaCondOps
  eb94818... RISC-V: Support immediates in XVentanaCondOps
  a91f812... RISC-V: Add instruction fusion (for ventana-vt1)
  b984846... RISC-V: Add basic support for the Ventana-VT1 core
  01fd2fc... RISC-V: Recognize bexti in negated if-conversion
  442eed7... RISC-V: Recognize sign-extract + and cases for XVentanaCond
  b80d64e... RISC-V: Support noce_try_store_flag_mask as vt.maskc<n>
  6ae6ae2... RISC-V: Generate vt.maskc<n> on noce_try_store_flag_mask if
  92e5603... RISC-V: Recognize xventanacondops extension
  f1836d0... RISC-V: Optimize masking with two clear bits not a SMALL_OP
  424802e... RISC-V: Use binvi to cover more immediates than with xori a
  ab8b000... RISC-V: Use bseti to cover more immediates than with ori al
  b551b51... RISC-V: Replace zero_extendsidi2_shifted with generalized s
  62b72e9... ifcombine: fold two bit tests with different polarity
  2ba9857... ifcombine: recognize single bit test of sign-bit
  3c9bac4... RISC-V: Implement movmisalign<mode> to enable SLP
  c5d23bb... RISC-V: Optimise adding a (larger than simm12) constant to 
  37db290... RISC-V: No extensions for SImode min/max against safe const
  20e569e... RISC-V: Optimize branches testing a bit-range or a shifted 
  46a2a54... RISC-V: allow bseti on SImode without sign-extension
  7debc3f... RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add
  e322d16... RISC-V: split to allow formation of sh[123]add before 32bit
  d67fd1e... RISC-V: bitmanip: add splitter to use bexti for "(a & (1 <<
  a3f8b49... RISC-V: branch-(not)equals-zero compares against $zero


Summary of changes (added commits):
-----------------------------------

  4c96c29... riscv: Add support for strlen inline expansion
  f206e3f... riscv: Use by-pieces to do overlapping accesses in block_mo
  7c3c415... riscv: Move riscv_block_move_loop to separate file
  8071a7d... riscv: Enable overlap-by-pieces via tune param
  c0034ca... riscv: bitmanip/zbb: Add prefix/postfix and enable visiblit
  b988c88... RISC-V: Use .p2align for code-alignment
  742a2b5... ifcvt: add if-conversion to conditional-zero instructions
  84199cd... RISC-V: Ventana-VT1 supports XVentanaCondOps
  ccbf6d5... RISC-V: Support immediates in XVentanaCondOps
  1908015... RISC-V: Add instruction fusion (for ventana-vt1)
  84b7d1c... RISC-V: Add basic support for the Ventana-VT1 core
  fcf4728... RISC-V: Recognize bexti in negated if-conversion
  f1cb12c... RISC-V: Recognize sign-extract + and cases for XVentanaCond
  966af83... RISC-V: Support noce_try_store_flag_mask as vt.maskc<n>
  8187af4... RISC-V: Generate vt.maskc<n> on noce_try_store_flag_mask if
  830289f... RISC-V: Recognize xventanacondops extension
  5fdf1e0... RISC-V: Optimize masking with two clear bits not a SMALL_OP
  289fd1a... RISC-V: Use binvi to cover more immediates than with xori a
  d99eeca... RISC-V: Use bseti to cover more immediates than with ori al
  156bbf9... RISC-V: Replace zero_extendsidi2_shifted with generalized s
  0598016... ifcombine: fold two bit tests with different polarity
  8b07e62... ifcombine: recognize single bit test of sign-bit
  ac8c73c... RISC-V: Implement movmisalign<mode> to enable SLP
  4aeab04... RISC-V: Optimise adding a (larger than simm12) constant to 
  19d866f... RISC-V: No extensions for SImode min/max against safe const
  e3560b1... RISC-V: Optimize branches testing a bit-range or a shifted 
  508091e... RISC-V: allow bseti on SImode without sign-extension
  e6aa763... RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add
  eed5fa2... RISC-V: split to allow formation of sh[123]add before 32bit
  920c4e2... RISC-V: branch-(not)equals-zero compares against $zero
  0045d25... RISC-V: Optimize masking with two clear bits not a SMALL_OP (*)
  1957bed... RISC-V: bitmanip: add splitter to use bexti for "(a & (1 << (*)
  705bae2... Enable shrink wrapping for the RISC-V target. (*)
  06c8f2e... aarch64: Add mode size check on LDAPR-extend patterns (*)
  822a082... [PR68097] Try to avoid recursing for floats in gimple_stmt_ (*)
  156f523... x86: Enable 256 move by pieces for ALDERLAKE machine. (*)
  cbe3130... middle-end: ensure that VEC_PERM operands get lowered to th (*)
  1bc7efa... middle-end: replace GET_MODE_WIDER_MODE with GET_MODE_NEXT_ (*)
  2b2f2ee... [range-ops] Minor readability fix. (*)
  928bc5b... Fix typo in gimple_fold_partial_load_store_mem_ref (*)
  a62d957... RISC-V: Optimize RVV epilogue logic. (*)
  e214cab... Fix multiple recent sh3/sh3eb regressions (*)
  f69a829... libstdc++: Ensure std::to_chars overloads all declared in < (*)
  8090952... Daily bump. (*)
  ff199a8... analyzer: more test coverage for named constants (*)
  6e49628... analyzer: log the stashing of named constants [PR107711] (*)
  bdd784f... Fortran: ICE on procedure arguments with non-integer length (*)
  c85f8db... c++: P2448 - Relaxing some constexpr restrictions [PR106649 (*)
  dbdce6a... libstdc++: Fix dumb typos in ALT128 support in <format> [PR (*)
  629897e... libstdc++: Improve performance of chrono::utc_clock::now() (*)
  2f5c071... libstdc++: Adjust <format> for Clang compatibility [PR10771 (*)
  22cb0fe... libstdc++: Disable std::format of _Float128 if std::to_char (*)
  96e4244... Fortran: error recovery after reference to bad CLASS variab (*)
  713dcfc... Fortran: ICE in simplification of array expression involvin (*)
  ac74b3f... RISC-V: Split "(a & (1UL << bitno)) ? 0 : 1" to bext + xori (*)
  3246255... RISC-V: Split "(a & (1UL << bitno)) ? 0 : -1" to bext + add (*)
  e91d514... testsuite: Fix mistransformed gcov (*)
  246bbda... tree-optimization/107686 - fix bitfield ref through vec_unp (*)
  8a5f366... middle-end/107679 - fix SSA rewrite of clobber of parameter (*)
  7026d04... libstdc++: Add test for chrono::utc_clock leap second offse (*)
  f6d6fd0... libatomic: regenerate Makefile.in (*)
  ec59848... libstdc++: Fix stream initialization with static library [P (*)
  c5e8c6c... c++: Alignment changes to layout compatibility/common initi (*)
  0e2c551... libstdc++: Fix up <complex> for extended floating point typ (*)
  cf958f8... c++: Fix up calls to static operator() or operator[] [PR107 (*)
  85966f0... doc: fix description of -mrelax-cmpxchg-loop [PR 107676] (*)
  d4cc7a8... i386: correct x87&SSE multiplication modeling in znver.md (*)
  dd744f0... i386: correct x87&SSE division modeling in znver.md (*)
  3c54805... libstdc++: Fix std::any pretty printer (*)
  9228162... libstdc++: Improve comments on pretty printer code (*)
  6f83861... gcn: Add __builtin_gcn_kernarg_ptr (*)
  21501ec... analyzer: use known_function to simplify region_model::on_c (*)
  3685aed... analyzer: split out checker-path.cc into a new checker-even (*)
  99c9cbc... gcc: m68k: fix PR target/107645 (*)
  f58e6d4... doc: invoke: pru/riscv: Fix option list formatting (*)
  1360290... c++: Implement CWG 2654 - Un-deprecation of compound volati (*)
  d59858f... nvptx/mkoffload.cc: Fix "$nohost" check (*)
  7f01402... c++: Allow attributes on concepts - DR 2428 (*)
  7c6cd9c... ragen-op-float: Fix up float_binary_op_range_finish [PR1076 (*)
  2b7f037... libstdc++: Fix gdb FilteringTypePrinter (*)
  63e1b2e... rtl: Try to remove EH edges after {pro,epi}logue generation (*)
  cdc3422... Daily bump. (*)
  ed1797d... c++: Disable -Wignored-qualifiers for template args [PR1074 (*)
  c717a92... RISC-V: Zihintpause: add __builtin_riscv_pause (*)
  6052482... bpf: avoid possible use of uninitialized variable (*)
  86a9000... analyzer: add warnings relating to sockets [PR106140] (*)
  d8aba86... c, analyzer: support named constants in analyzer [PR106302] (*)
  46c3d9c... demangler: Templated lambda demangling (*)
  ee08aa9... diagnostics: Remove null-termination requirement for json:: (*)
  15d3155... diagnostics: Use an inline function rather than hardcoding  (*)
  6238cc2... diagnostics: Fix macro tracking for ad-hoc locations (*)
  3037f11... libsanitizer: update LOCAL_PATCHES (*)
  f546846... asan: update expected format based on ASAN (*)
  0c7a928... libsanitizer: Apply local patches (*)
  5f3fa26... libsanitizer: merge from upstream ae59131d3ef311fb4b1e50627 (*)
  d1288d8... libatomic: Add support for LSE and LSE2 (*)
  5925f0e... c++: remove i_c_e_p parm from tsubst_copy_and_build (*)
  c52c322... c++: remove function_p parm from tsubst_copy_and_build (*)
  c68c468... libstdc++: Fix std::format test for strict -std=c++20 mode (*)
  a5d4f38... libstc++: std::formattable concept should not be defined fo (*)
  ce86d96... libstdc++: Fix detection of std::format support for __float (*)

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