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* [gcc r13-4324] arm: improve tests and fix vcmp*
@ 2022-11-28 9:11 Andrea Corallo
0 siblings, 0 replies; only message in thread
From: Andrea Corallo @ 2022-11-28 9:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:1fa5a44736062eeccd241ebeb1771bd77b7fd168
commit r13-4324-g1fa5a44736062eeccd241ebeb1771bd77b7fd168
Author: Andrea Corallo <andrea.corallo@arm.com>
Date: Mon Oct 10 11:59:58 2022 +0200
arm: improve tests and fix vcmp*
gcc/ChangeLog:
* config/arm/mve.md (@mve_vcmp<mve_cmp_op>q_<mode>): Fix
spacing.
* config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m)
(__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
Diff:
---
gcc/config/arm/arm_mve.h | 47 ++++++++++++++++++++++
gcc/config/arm/mve.md | 2 +-
.../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c | 20 ++++++++-
.../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmphiq_u8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpleq_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpltq_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_f32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c | 29 +++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 47 ++++++++++++++++++++--
.../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c | 47 ++++++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c | 29 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 34 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 20 ++++++++-
.../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 20 ++++++++-
170 files changed, 4512 insertions(+), 421 deletions(-)
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 073e3711623..684f997520f 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -39229,6 +39229,53 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+ __typeof(p1) __p1 = (p1); \
+ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+ __typeof(p1) __p1 = (p1); \
+ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+ __typeof(p1) __p1 = (p1); \
+ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));})
+
+#define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
+ __typeof(p1) __p1 = (p1); \
+ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
+ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
+ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \
+ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \
+ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \
+ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \
+ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \
+ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));})
+
#define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 6d5270281ec..3330a220aea 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -831,7 +831,7 @@
(match_operand:MVE_2 2 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE"
- "vcmp.<mve_cmp_type>%#<V_sz_elem> <mve_cmp_op>, %q1, %q2"
+ "vcmp.<mve_cmp_type>%#<V_sz_elem>\t<mve_cmp_op>, %q1, %q2"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
index a1640133012..de9fe5e7d01 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpcsq_m_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
index d269ec7e3ab..04df1b2dc61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpcsq_m_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
index 52c16b3e70f..34ebadca248 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpcsq_m_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vcmpcsq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
index e68afa316a9..bc03bf687de 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpcsq_m_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
index 05d1b21b279..8e216d49a02 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpcsq_m_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
index 4c8a9d0aa2c..ac4196a2e48 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpcsq_m_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpcsq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
index 4124036003e..6038f4c8c65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b)
{
return vcmpcsq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo1:
+** ...
+** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo2:
+** ...
+** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+ return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
index 463c1ee12b4..9f39aa761c8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b)
{
return vcmpcsq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo1:
+** ...
+** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo2:
+** ...
+** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+ return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
index 92bc44a4bb6..0ce2cd13a7b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b)
{
return vcmpcsq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo1:
+** ...
+** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo2:
+** ...
+** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+ return vcmpcsq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
index 26c7d750cef..5598d06875c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcmpcsq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo1:
+** ...
+** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
index c91b0e1c2e3..99b232b05dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcmpcsq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo1:
+** ...
+** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
index 51ddab91500..571e57135ab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcmpcsq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo1:
+** ...
+** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcmpcsq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
index 556351f4984..57b276a1d4c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpeqq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
index 65b2f240520..ab1b25e2888 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpeqq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
index 91b0ffa0afd..c5587884d0e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
index d66e9c8be34..4e9675fff51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
index 46b3f4499d3..a3cae828e79 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpeqq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
index 7d672c129db..a7ce9e0c7e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpeqq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
index 912d4ad893d..7ba481e169f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
index 947c331622d..13c88eaabb5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
index e215d655ea2..dcf276dee44 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
index ea4716c450e..d59d5149a30 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
index 489c6ec0cb3..1fbf385d030 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
index e8dfce432d1..92758c98c9a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpeqq_m_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vcmpeqq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
index 7e4c141e5d2..1ea35ed924b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
index 904cfb6fe37..a9bc9733842 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
index a7e12164e32..a9fe771a101 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpeqq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
index 283e1fd036e..826901874d7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
index ad1739bd609..512b7f9c889 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
index 595142e9cda..01b4507ba63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpeqq_m_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpeqq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
index f97209d2322..cf2812558ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpeqq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpeqq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
index c80843288b2..13817174282 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpeqq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpeqq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
index 69f1f531af4..bd29828492e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpeqq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
index 06032dbcc20..2a0d84e9b51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpeqq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
index 3ebd88be85b..524bbe9f3cb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpeqq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
index 2f6c53a525e..3eeaa49aa97 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b)
{
return vcmpeqq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo2:
+** ...
+** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+ return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
index 22fb5be97c5..a881bb841af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b)
{
return vcmpeqq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo2:
+** ...
+** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+ return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
index 79eaeed6950..429b2e35eb7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b)
{
return vcmpeqq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo2:
+** ...
+** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+ return vcmpeqq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
index 7951ead8a31..92a87c08773 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpeqq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
index 659ccb4ac14..d3b87d59bfa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpeqq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
index 9282ec2a97a..2b71bbf75f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpeqq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
index 318b7aa9306..1830b667bb6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcmpeqq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
index 88e015f1fa3..2b2a5f920f3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcmpeqq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
index 990a96f7b3f..9450c203394 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcmpeqq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcmpeqq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
index eea63a2fe50..fd8bcab4f25 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpgeq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
index 64243fe3e8c..a2d50b580e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpgeq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
index 3588b0a536f..a631825fadd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpgeq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
index 8ed1d22e919..b94e0738ef0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpgeq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
index d106af8f53b..9f4903d9cfd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpgeq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpgeq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
index 1feef8adb7f..679e644f165 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpgeq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpgeq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
index c0ad38f6c6f..45e26d0a77b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpgeq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
index 8974ce4d11a..3a6cad921f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpgeq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
index 981aa1b516c..ce1ca30d6ea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpgeq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
index 587432a6af1..51587a38b72 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpgeq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
index e460a8dcafc..3ff0aaaa414 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpgeq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
index cde28a314b9..df71ee57945 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpgeq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpgeq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
index 907fa5d50f6..2ca1b9d6684 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpgeq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpgeq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
index e4d1406c049..3af110bd2b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpgeq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpgeq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
index f4aad09e783..3c1af8a93ab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpgeq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
index 2baa5204819..8b4e0f426e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpgeq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
index 1dcffcc3050..c1669bcdd90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpgeq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
index 817ffb2d8ac..593c7410dcb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpgeq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
index d608b7fc9cf..9e26ea9938a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpgeq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
index 506e6cede95..3cb2832e159 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpgeq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpgeq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
index e2bfd7ed156..8835fe08dba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpgtq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
index 1b4433f0e76..e1470884708 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpgtq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
index def3f90a79d..cb9d5f4036f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpgtq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
index 41a11563f36..b249b831782 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpgtq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
index 80c86f65825..b375983f01e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpgtq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpgtq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
index 9b7aaadfe71..208a285cb39 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpgtq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpgtq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
index c0719d0110c..248e3093d2a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpgtq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
index 26df8cea9fc..9843288296e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpgtq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
index f20c50d69c1..80f1aa9ead0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpgtq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
index da97abceb2e..9289c00b5af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpgtq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
index ab7c218c7af..8a3d7606bb7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpgtq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
index 13520d1067b..2760795eb86 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpgtq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpgtq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
index 98e152cd999..9f2a4be319a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpgtq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpgtq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
index 5691e2f9d35..bbf18ebe6e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpgtq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpgtq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
index bc3bdbae2da..d833cb6f58e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpgtq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
index 409a3f9d808..28cd51b9582 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpgtq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
index 2624307be9d..5a953ca55f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpgtq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
index be19e19f09f..b9c9da486f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpgtq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
index 95f6c703b9d..0f79385358e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpgtq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
index 8ba180d8e39..f59dad94a57 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpgtq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpgtq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
index 26e5fe3f900..136a2e44259 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmphiq_m_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
index 51396b8d0cd..5640b97afaf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmphiq_m_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
index 475f2e82345..e6474e45487 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmphiq_m_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vcmphiq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
index 98ba895fde0..38b9b90c803 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmphiq_m_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
index ee561b02d0c..97c8c1dfe05 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmphiq_m_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
index 0c5b29e2673..e2024ccda25 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmphiq_m_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmphiq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
index d39b755441d..36107fc7b8d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b)
{
return vcmphiq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo1:
+** ...
+** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo2:
+** ...
+** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+ return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
index dbedea9b078..d34de8f65c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b)
{
return vcmphiq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo1:
+** ...
+** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo2:
+** ...
+** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+ return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
index 967bb206886..93a05b1a857 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b)
{
return vcmphiq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo1:
+** ...
+** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo2:
+** ...
+** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+ return vcmphiq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
index f9399498a99..40e65dc52f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcmphiq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/*
+**foo1:
+** ...
+** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
index becdef0696a..d87a4185762 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcmphiq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/*
+**foo1:
+** ...
+** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
index 933cc69507d..80fd2a40b0f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcmphiq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/*
+**foo1:
+** ...
+** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcmphiq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
index c2e69a5de92..209d81096af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpleq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
index 923aee050d3..b92c5f66fd9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpleq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
index 66a37192985..e6136898ded 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpleq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
index e679b338d58..2304e98d253 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpleq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
index 42049fd57a4..a61db2817c1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpleq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpleq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
index c68bd4e5900..7a2cdb4059d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpleq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpleq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
index 0cdc14455a3..69fcab15b8a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpleq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
index a955af8fa2b..617ebd6144f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpleq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
index d9951e4a8cf..b8ee50dd55c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpleq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
index f16aff86ef0..fcc376d6ec3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpleq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
index 2c4e659e9cf..9983e89d80c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpleq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
index 69b88cfb389..504e4feb5d1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpleq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpleq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
index 3fa3c5e0310..cfa6dbc07c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpleq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpleq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
index 8349de7b68c..c89558f4076 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpleq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpleq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
index 5ecae572227..da73fc14b77 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpleq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
index 02320e7a552..0951a5c13fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpleq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
index a0ac97328b7..e4553354681 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpleq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
index 2fb4acd3d74..68500da9ddf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpleq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
index 2ae998efb7c..1966bcd94d3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpleq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
index da06b019cc1..e9f6e47e5d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpleq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpleq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
index eab80b2ddd9..b4958816bd8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpltq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
index f17d16482dd..752ab2b3e49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpltq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
index 93c36f3a613..cbaacbe2b47 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpltq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
index a17f0b02a95..96d0e7c7cc6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpltq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
index 45d0f51b4d7..1e5db53198e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpltq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpltq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
index 16e37ccaf8d..77de40ade01 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpltq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpltq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
index d0e322fbede..beebe65a58f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpltq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
index 7ec7963267a..07260c56ed3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpltq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
index 22434e88cd6..7d1e9e7fbde 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpltq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
index 359c0640784..c0f6dfc9432 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpltq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
index 3df7e89a6f5..b6fc4700e73 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpltq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
index 1055c2b661c..545b76359ad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpltq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpltq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
index 2d55af20dd3..401ef21ba2b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpltq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpltq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
index 2590ca83c45..380f071e564 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpltq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpltq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
index 169f6ad4610..a1d12392dd2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpltq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
index 534047c2df3..6332f75f327 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpltq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
index da659f1f2be..e0ac80caeb0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpltq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
index da4c90a07de..23843ad88f3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpltq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/*
+**foo1:
+** ...
+** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
index 5dc218a5f40..aeb7a6f9896 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpltq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/*
+**foo1:
+** ...
+** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
index ea5853c212c..2129b56a5f7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpltq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/*
+**foo1:
+** ...
+** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpltq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
index 8d1c6096c56..c27ea2f0de8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b)
{
return vcmpneq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
index 860bd69c129..609de44d8e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b)
{
return vcmpneq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
index a4e62de7272..98f22337d61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpneq_m_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
index b18a2e5fd88..7f6e96ae47e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpneq_m_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
index c127b3a68f6..71b3476fb18 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpneq_m_n_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+ return vcmpneq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
index a8423d45708..d6dea8db865 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpneq_m_n_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+ return vcmpneq_m (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
index 63ee1c3bffb..e72c9b62829 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpneq_m_n_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
index 10f6d448d76..47c90e31f49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpneq_m_n_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
index 66e5d158c51..9d9da100046 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpneq_m_n_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
index ffe6ff919cf..ea8cf24b358 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpneq_m_n_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+ return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
index 55e796a1138..30291dcdd9b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpneq_m_n_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+ return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
index 3c8bd16647a..be75376a691 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
@@ -1,22 +1,63 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpneq_m_n_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+ return vcmpneq_m (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
index d3e1ce0e690..60e868141d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpneq_m_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
index f5602ffd0da..780c544bef3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpneq_m_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
index 84b8b1617b0..15f6d316cba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpneq_m_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
index 3c8943719bb..300852ed7b3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpneq_m_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
index 980cc4124b2..227b5f01eca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpneq_m_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
index 2615dcb37b9..cfcb59f49cf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpneq_m_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmpt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcmpneq_m (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
index e9e2a9c7b04..29e43f3fdf8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float16x8_t a, float16_t b)
{
return vcmpneq_n_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo1:
+** ...
+** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float16x8_t a, float16_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f16" } } */
+/*
+**foo2:
+** ...
+** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float16x8_t a)
+{
+ return vcmpneq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
index eb64b17969c..688e77cd044 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (float32x4_t a, float32_t b)
{
return vcmpneq_n_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo1:
+** ...
+** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (float32x4_t a, float32_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.f32" } } */
+/*
+**foo2:
+** ...
+** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (float32x4_t a)
+{
+ return vcmpneq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
index 14689242ee4..2afc34d16e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16_t b)
{
return vcmpneq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
index 53418ff3923..6c323161316 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32_t b)
{
return vcmpneq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
index fa405c281b4..5483d6dd2fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8_t b)
{
return vcmpneq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
index cc8540b3a6c..d8edfb0d825 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16_t b)
{
return vcmpneq_n_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo2:
+** ...
+** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint16x8_t a)
+{
+ return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
index 07c9b1ade96..2b7a6b56830 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32_t b)
{
return vcmpneq_n_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo2:
+** ...
+** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint32x4_t a)
+{
+ return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
index eac5e96384e..2dab43af331 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
@@ -1,21 +1,51 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8_t b)
{
return vcmpneq_n_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo2:
+** ...
+** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
+mve_pred16_t
+foo2 (uint8x16_t a)
+{
+ return vcmpneq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
index 6b04ce70ffc..d57b607baa9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int16x8_t a, int16x8_t b)
{
return vcmpneq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
index cfb98d7e650..e02171f6686 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int32x4_t a, int32x4_t b)
{
return vcmpneq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
index ae69be4ba0b..0abef8c3e00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (int8x16_t a, int8x16_t b)
{
return vcmpneq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
index 51059f21191..7144f3ee2fc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcmpneq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/*
+**foo1:
+** ...
+** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
index 42e4a3f4f2d..a31134f2f1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcmpneq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/*
+**foo1:
+** ...
+** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
index addacc15833..2801c8e3763 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
@@ -1,21 +1,37 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcmpneq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/*
+**foo1:
+** ...
+** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|)
+** ...
+*/
mve_pred16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcmpneq (a, b);
}
-/* { dg-final { scan-assembler "vcmp.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
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2022-11-28 9:11 [gcc r13-4324] arm: improve tests and fix vcmp* Andrea Corallo
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