[gcc r13-4538] AArch64: Fix assert in aarch64_move_imm [PR108006]

[gcc r13-4538] AArch64: Fix assert in aarch64_move_imm [PR108006]

[Wilco Dijkstra]

https://gcc.gnu.org/g:952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9

commit r13-4538-g952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9
Author: Wilco Dijkstra <wilco.dijkstra@arm.com>
Date:   Wed Dec 7 14:16:24 2022 +0000

    AArch64: Fix assert in aarch64_move_imm [PR108006]
    
    Ensure we only pass SI/DImode which fixes the assert.
    
    gcc/
            PR target/108006
            * config/aarch64/aarch64.cc (aarch64_expand_sve_const_vector):
            Fix call to aarch64_move_imm to use SI/DI.

Diff:
---
 gcc/config/aarch64/aarch64.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 89bf0dff904..27a814d8621 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -6513,7 +6513,8 @@ aarch64_expand_sve_const_vector (rtx target, rtx src)
 	  /* If the integer can be moved into a general register by a
 	     single instruction, do that and duplicate the result.  */
 	  if (CONST_INT_P (elt_value)
-	      && aarch64_move_imm (INTVAL (elt_value), elt_mode))
+	      && aarch64_move_imm (INTVAL (elt_value),
+				   encoded_bits <= 32 ? SImode : DImode))
 	    {
 	      elt_value = force_reg (elt_mode, elt_value);
 	      return expand_vector_broadcast (mode, elt_value);