public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc r13-4621] AArch64: Enable TARGET_CONST_ANCHOR
@ 2022-12-12 16:36 Wilco Dijkstra
0 siblings, 0 replies; only message in thread
From: Wilco Dijkstra @ 2022-12-12 16:36 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2d7c73ee5eae47eee16ddab3df2928ff5a7dd89c
commit r13-4621-g2d7c73ee5eae47eee16ddab3df2928ff5a7dd89c
Author: Wilco Dijkstra <wilco.dijkstra@arm.com>
Date: Mon Dec 12 15:44:03 2022 +0000
AArch64: Enable TARGET_CONST_ANCHOR
Enable TARGET_CONST_ANCHOR to allow complex constants to be created via
immediate add/sub. Use a 24-bit range as that enables a 3 or 4-instruction
immediate to be replaced by 2 add/sub instructions. Fix the costing of
add/sub to support 24-bit and 12-bit shifted immediates.
The generated code for the testcase is now the same or better than LLVM.
It also results in a small codesize reduction on SPEC.
gcc/
* config/aarch64/aarch64.cc (aarch64_rtx_costs): Add correct costs
for 24-bit and 12-bit shifted immediate add/sub.
(TARGET_CONST_ANCHOR): Define.
* config/aarch64/predicates.md (aarch64_pluslong_immediate):
Fix range check.
gcc/testsuite/
* gcc.target/aarch64/movk_3.c: New test.
Diff:
---
gcc/config/aarch64/aarch64.cc | 13 +++++++
gcc/config/aarch64/predicates.md | 2 +-
gcc/testsuite/gcc.target/aarch64/movk_3.c | 56 +++++++++++++++++++++++++++++++
3 files changed, 70 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 523d49a1a42..73515c174fa 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -14237,6 +14237,16 @@ cost_plus:
return true;
}
+ if (aarch64_pluslong_immediate (op1, mode))
+ {
+ /* 24-bit add in 2 instructions or 12-bit shifted add. */
+ if ((INTVAL (op1) & 0xfff) != 0)
+ *cost += COSTS_N_INSNS (1);
+
+ *cost += rtx_cost (op0, mode, PLUS, 0, speed);
+ return true;
+ }
+
*cost += rtx_cost (op1, mode, PLUS, 1, speed);
/* Look for ADD (extended register). */
@@ -28091,6 +28101,9 @@ aarch64_libgcc_floating_mode_supported_p
#undef TARGET_HAVE_SHADOW_CALL_STACK
#define TARGET_HAVE_SHADOW_CALL_STACK true
+#undef TARGET_CONST_ANCHOR
+#define TARGET_CONST_ANCHOR 0x1000000
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-aarch64.h"
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 6175875fbc6..ff7f73d3f30 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -146,7 +146,7 @@
(define_predicate "aarch64_pluslong_immediate"
(and (match_code "const_int")
- (match_test "(INTVAL (op) < 0xffffff && INTVAL (op) > -0xffffff)")))
+ (match_test "IN_RANGE (INTVAL (op), -0xffffff, 0xffffff)")))
(define_predicate "aarch64_sminmax_immediate"
(and (match_code "const_int")
diff --git a/gcc/testsuite/gcc.target/aarch64/movk_3.c b/gcc/testsuite/gcc.target/aarch64/movk_3.c
new file mode 100644
index 00000000000..9e8c0c42671
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/movk_3.c
@@ -0,0 +1,56 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+
+/* 2 MOV */
+void f16 (long *p)
+{
+ p[0] = 0x1234;
+ p[2] = 0x1235;
+}
+
+/* MOV, MOVK and ADD */
+void f32_1 (long *p)
+{
+ p[0] = 0x12345678;
+ p[2] = 0x12345678 + 0xfff;
+}
+
+/* 2 MOV, 2 MOVK */
+void f32_2 (long *p)
+{
+ p[0] = 0x12345678;
+ p[2] = 0x12345678 + 0x555555;
+}
+
+/* MOV, MOVK and ADD */
+void f32_3 (long *p)
+{
+ p[0] = 0x12345678;
+ p[2] = 0x12345678 + 0x999000;
+}
+
+/* MOV, 2 MOVK and ADD */
+void f48_1 (long *p)
+{
+ p[0] = 0x123456789abc;
+ p[2] = 0x123456789abc + 0xfff;
+}
+
+/* MOV, 2 MOVK and 2 ADD */
+void f48_2 (long *p)
+{
+ p[0] = 0x123456789abc;
+ p[2] = 0x123456789abc + 0x666666;
+}
+
+/* 2 MOV, 4 MOVK */
+void f48_3 (long *p)
+{
+ p[0] = 0x123456789abc;
+ p[2] = 0x123456789abc + 0x1666666;
+}
+
+/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, \[0-9\]+" 10 } } */
+/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x\[0-9a-f\]+" 12 } } */
+/* { dg-final { scan-assembler-times "add\tx\[0-9\]+, x\[0-9\]+, \[0-9\]+" 5 } } */
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2022-12-12 16:36 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-12 16:36 [gcc r13-4621] AArch64: Enable TARGET_CONST_ANCHOR Wilco Dijkstra
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).