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* [gcc r13-4915] Daily bump.
@ 2022-12-29 0:18 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2022-12-29 0:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9b111debbfb79a0aa01091c8b1936b05a11ffcf9
commit r13-4915-g9b111debbfb79a0aa01091c8b1936b05a11ffcf9
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Thu Dec 29 00:17:39 2022 +0000
Daily bump.
Diff:
---
contrib/ChangeLog | 4 ++++
gcc/ChangeLog | 33 +++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 9 +++++++++
4 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/contrib/ChangeLog b/contrib/ChangeLog
index 3b639f40d7d..9c1dd3a17f4 100644
--- a/contrib/ChangeLog
+++ b/contrib/ChangeLog
@@ -1,3 +1,7 @@
+2022-12-28 Martin Liska <mliska@suse.cz>
+
+ * update-copyright.py: Add contrib folder.
+
2022-12-23 Arsen Arsenović <arsen@aarsen.me>
* dg-out-generator.pl: New file.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f670edf4ae8..b43b03d06c4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,36 @@
+2022-12-28 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/i386.md (*clzsi2_lzcnt_zext_2): define_insn_and_split
+ to match ZERO_EXTEND form of *clzsi2_lzcnt_zext.
+ (*clzsi2_lzcnt_zext_2_falsedep): Likewise, new define_insn to match
+ ZERO_EXTEND form of *clzsi2_lzcnt_zext_falsedep.
+ (*bmi2_bzhi_zero_extendsidi_5): Likewise, new define_insn to match
+ ZERO_EXTEND form of *bmi2_bzhi_zero_extendsidi.
+ (*popcountsi2_zext_2): Likewise, new define_insn_and_split to match
+ ZERO_EXTEND form of *popcountsi2_zext.
+ (*popcountsi2_zext_2_falsedep): Likewise, new define_insn to match
+ ZERO_EXTEND form of *popcountsi2_zext_falsedep.
+ (*popcounthi2_2): Likewise, new define_insn_and_split to match
+ ZERO_EXTEND form of *popcounthi2.
+ (define_peephole2): ZERO_EXTEND variant of HImode popcount&1 using
+ parity flag peephole2.
+
+2022-12-28 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/i386-expand.cc (ix86_split_ashl): Call
+ ix86_expand_clear to generate an xor instruction.
+
+2022-12-28 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/108137
+ * tree-ssa-strlen.cc (get_range_strlen_phi): Reject anything
+ different from INTEGER_CST.
+
+2022-12-28 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv-vsetvl.h (vl_vtype_info::get_avl_info):
+ Return const reference rather than value.
+
2022-12-27 Jeff Law <jlaw@ventanamicro.com>
* config/riscv/riscv.md: Add missing modes to last patch.t
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index e65d79fa1d5..cf083afb247 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20221228
+20221229
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7dd0a492402..da85e7935b9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2022-12-28 Roger Sayle <roger@nextmovesoftware.com>
+
+ * gcc.target/i386/ashlti3-1.c: New test case.
+
+2022-12-28 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/108137
+ * gcc.dg/tree-ssa/pr108137.c: New test.
+
2022-12-27 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
PR target/95632
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