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* [gcc(refs/users/meissner/heads/work104)] Reset IFmode, KFmode, TFmode precision to 128.
@ 2023-01-04 18:14 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2023-01-04 18:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a729076d1dca1673390fe172324173c9f0a68b4a
commit a729076d1dca1673390fe172324173c9f0a68b4a
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Jan 4 13:13:53 2023 -0500
Reset IFmode, KFmode, TFmode precision to 128.
2023-01-04 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-modes.def: Set the precision of IFmode, KFmode,
TFmode initially to 126-128, but then reset the precision to 128 after
initialization.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
support for special precisions for IFmode, KFmode, and TFmode.
* config/rs6000/rs6000.h (config/rs6000/rs6000-modes.h): Delete include
file.
* genmodes.cc (need_precision_adj): New variable to support
ADJUST_PRECISION.
(struct mode_data): Add field for adjusting precision.
(ADJUST_PRECISION): New macro.
(mode_unit_precision_inline): Add support for ADJUST_PRECISION.
(emit_insn_modes_h): Likewise.
(emit_mode_precision): Likewise.
(emit_mode_unit_precision): Likewise.
(emit_mode_adjustments): Likewise.
* machmode.def (ADJUST_PRECISION): Document usage.
* machmode.h (mode_unit_precision): Add support for ADJUST_PRECISION.
* config/rs6000/rs6000-modes.h: Delete file.
Diff:
---
gcc/config/rs6000/rs6000-modes.def | 35 +++++++----------------
gcc/config/rs6000/rs6000-modes.h | 36 ------------------------
gcc/config/rs6000/rs6000.cc | 6 ++--
gcc/config/rs6000/rs6000.h | 5 ----
gcc/config/rs6000/t-rs6000 | 1 -
gcc/genmodes.cc | 57 ++++++++++++++++++++++++++++++++++----
gcc/machmode.def | 7 +++--
gcc/machmode.h | 2 +-
8 files changed, 69 insertions(+), 80 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def
index 8ef910869c5..82828964f8e 100644
--- a/gcc/config/rs6000/rs6000-modes.def
+++ b/gcc/config/rs6000/rs6000-modes.def
@@ -18,39 +18,24 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* We order the 3 128-bit floating point types so that IFmode (IBM 128-bit
- floating point) is the 128-bit floating point type with the highest
- precision (128 bits). This so that machine independent parts of the
- compiler do not try to widen IFmode to TFmode on ISA 3.0 (power9) that has
- hardware support for IEEE 128-bit. We set TFmode (long double mode) in
- between, and KFmode (explicit __float128) below it.
-
- Previously, IFmode and KFmode were defined to be fractional modes and TFmode
- was the standard mode. Since IFmode does not define the normal arithmetic
- insns (other than neg/abs), on a ISA 3.0 system, the machine independent
- parts of the compiler would see that TFmode has the necessary hardware
- support, and widen the operation from IFmode to TFmode. However, IEEE
- 128-bit is not strictly a super-set of IBM extended double and the
- conversion to/from IEEE 128-bit was a function call.
-
- We now make IFmode the highest fractional mode, which means its values are
- not considered for widening. Since we don't define insns for IFmode, the
- IEEE 128-bit modes would not widen to IFmode. */
-
-#ifndef RS6000_MODES_H
-#include "config/rs6000/rs6000-modes.h"
-#endif
+/* We use precision 126, 127, and 128 to differentiate between the 3 128-bit
+ floating point modes in these declarations because genmodes.cc wants to sort
+ by the precision. We reset the precision back to 128 after
+ initialization in the compiler. */
/* IBM 128-bit floating point. */
-FRACTIONAL_FLOAT_MODE (IF, FLOAT_PRECISION_IFmode, 16, ibm_extended_format);
+FRACTIONAL_FLOAT_MODE (IF, 126, 16, ibm_extended_format);
+ADJUST_PRECISION(IF, 128);
/* Explicit IEEE 128-bit floating point. */
-FRACTIONAL_FLOAT_MODE (KF, FLOAT_PRECISION_KFmode, 16, ieee_quad_format);
+FRACTIONAL_FLOAT_MODE (KF, 127, 16, ieee_quad_format);
+ADJUST_PRECISION(KF, 128);
/* 128-bit floating point, either IBM 128-bit or IEEE 128-bit. This is
adjusted in rs6000_option_override_internal to be the appropriate floating
point type. */
-FRACTIONAL_FLOAT_MODE (TF, FLOAT_PRECISION_TFmode, 16, ieee_quad_format);
+FRACTIONAL_FLOAT_MODE (TF, 128, 16, ieee_quad_format);
+ADJUST_PRECISION(TF, 128);
/* Add any extra modes needed to represent the condition code.
diff --git a/gcc/config/rs6000/rs6000-modes.h b/gcc/config/rs6000/rs6000-modes.h
deleted file mode 100644
index 64abf886db3..00000000000
--- a/gcc/config/rs6000/rs6000-modes.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Definitions 128-bit floating point precisions used by PowerPC.
- Copyright (C) 2018-2022 Free Software Foundation, Inc.
- Contributed by Michael Meissner (meissner@linux.ibm.com)
-
- This file is part of GCC.
-
- GCC is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published
- by the Free Software Foundation; either version 3, or (at your
- option) any later version.
-
- GCC is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
- License for more details.
-
- You should have received a copy of the GNU General Public License
- along with GCC; see the file COPYING3. If not see
- <http://www.gnu.org/licenses/>. */
-
-/* We order the 3 128-bit floating point types so that IFmode (IBM 128-bit
- floating point) is the 128-bit floating point type with the highest
- precision (128 bits). This so that machine independent parts of the
- compiler do not try to widen IFmode to TFmode on ISA 3.0 (power9) that has
- hardware support for IEEE 128-bit. We set TFmode (long double mode) in
- between, and KFmode (explicit __float128) below it.
-
- We won't encounter conversion from IEEE 128-bit to IBM 128-bit because we
- don't have insns to support the IBM 128-bit aritmetic operations. */
-
-#ifndef RS6000_MODES_H
-#define RS6000_MODES_H 1
-#define FLOAT_PRECISION_IFmode 128
-#define FLOAT_PRECISION_TFmode 127
-#define FLOAT_PRECISION_KFmode 126
-#endif /* RS6000_MODES_H */
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c508e891413..ab643ad8925 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4115,7 +4115,7 @@ rs6000_option_override_internal (bool global_init_p)
128 into the precision used for TFmode. */
int default_long_double_size = (RS6000_DEFAULT_LONG_DOUBLE_SIZE == 64
? 64
- : FLOAT_PRECISION_TFmode);
+ : 128);
/* Set long double size before the IEEE 128-bit tests. */
if (!OPTION_SET_P (rs6000_long_double_type_size))
@@ -4127,10 +4127,8 @@ rs6000_option_override_internal (bool global_init_p)
else
rs6000_long_double_type_size = default_long_double_size;
}
- else if (rs6000_long_double_type_size == FLOAT_PRECISION_TFmode)
- ; /* The option value can be seen when cl_target_option_restore is called. */
else if (rs6000_long_double_type_size == 128)
- rs6000_long_double_type_size = FLOAT_PRECISION_TFmode;
+ rs6000_long_double_type_size = 128;
/* Set -mabi=ieeelongdouble on some old targets. In the future, power server
systems will also set long double to be IEEE 128-bit. AIX and Darwin
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index b4df22b6030..440ab55a067 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -30,11 +30,6 @@
#include "config/rs6000/rs6000-opts.h"
#endif
-/* 128-bit floating point precision values. */
-#ifndef RS6000_MODES_H
-#include "config/rs6000/rs6000-modes.h"
-#endif
-
/* Definitions for the object file format. These are set at
compile-time. */
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index 597cea423ec..72bf66dddf2 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -19,7 +19,6 @@
# <http://www.gnu.org/licenses/>.
TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def
-TM_H += $(srcdir)/config/rs6000/rs6000-modes.h
PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def
EXTRA_GTYPE_DEPS += rs6000-builtins.h
diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc
index 2d418f09aab..67914ae5630 100644
--- a/gcc/genmodes.cc
+++ b/gcc/genmodes.cc
@@ -77,6 +77,8 @@ struct mode_data
adjustment */
bool need_bytesize_adj; /* true if this mode needs dynamic size
adjustment */
+ bool need_precision_adj; /* true if this mode needs dynamic precision
+ adjustment */
unsigned int int_n; /* If nonzero, then __int<INT_N> will be defined */
bool boolean;
};
@@ -89,7 +91,7 @@ static const struct mode_data blank_mode = {
0, "<unknown>", MAX_MODE_CLASS,
0, -1U, -1U, -1U, -1U,
0, 0, 0, 0, 0, 0,
- "<unknown>", 0, 0, 0, 0, false, false, 0,
+ "<unknown>", 0, 0, 0, 0, false, false, false, 0,
false
};
@@ -114,6 +116,7 @@ static struct mode_adjust *adj_alignment;
static struct mode_adjust *adj_format;
static struct mode_adjust *adj_ibit;
static struct mode_adjust *adj_fbit;
+static struct mode_adjust *adj_precision;
/* Mode class operations. */
static enum mode_class
@@ -822,6 +825,7 @@ make_vector_mode (enum mode_class bclass,
#define ADJUST_FLOAT_FORMAT(M, X) _ADD_ADJUST (format, M, X, FLOAT, FLOAT)
#define ADJUST_IBIT(M, X) _ADD_ADJUST (ibit, M, X, ACCUM, UACCUM)
#define ADJUST_FBIT(M, X) _ADD_ADJUST (fbit, M, X, FRACT, UACCUM)
+#define ADJUST_PRECISION(M, X) _ADD_ADJUST (precision, M, X, FLOAT, FLOAT)
static int bits_per_unit;
static int max_bitsize_mode_any_int;
@@ -1212,7 +1216,8 @@ extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
unsigned short\n\
mode_unit_precision_inline (machine_mode mode)\n\
{\n\
- extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];\n\
+ extern CONST_MODE_PRECISION unsigned short \n\
+ mode_unit_precision[NUM_MACHINE_MODES];\n\
gcc_assert (mode >= 0 && mode < NUM_MACHINE_MODES);\n\
switch (mode)\n\
{");
@@ -1360,7 +1365,8 @@ enum machine_mode\n{");
/* I can't think of a better idea, can you? */
printf ("#define CONST_MODE_NUNITS%s\n", adj_nunits ? "" : " const");
- printf ("#define CONST_MODE_PRECISION%s\n", adj_nunits ? "" : " const");
+ printf ("#define CONST_MODE_PRECISION%s\n",
+ adj_precision || adj_nunits ? "" : " const");
printf ("#define CONST_MODE_SIZE%s\n",
adj_bytesize || adj_nunits ? "" : " const");
printf ("#define CONST_MODE_UNIT_SIZE%s\n", adj_bytesize ? "" : " const");
@@ -1479,7 +1485,7 @@ emit_mode_precision (void)
struct mode_data *m;
print_maybe_const_decl ("%spoly_uint16_pod", "mode_precision",
- "NUM_MACHINE_MODES", adj_nunits);
+ "NUM_MACHINE_MODES", adj_precision || adj_nunits);
for_all_modes (c, m)
if (m->precision != (unsigned int)-1)
@@ -1699,7 +1705,8 @@ emit_mode_unit_precision (void)
int c;
struct mode_data *m;
- print_decl ("unsigned short", "mode_unit_precision", "NUM_MACHINE_MODES");
+ print_maybe_const_decl ("%sunsigned short", "mode_unit_precision",
+ "NUM_MACHINE_MODES", adj_precision);
for_all_modes (c, m)
{
@@ -1963,6 +1970,46 @@ emit_mode_adjustments (void)
printf ("\n /* %s:%d */\n REAL_MODE_FORMAT (E_%smode) = %s;\n",
a->file, a->line, a->mode->name, a->adjustment);
+
+ /* Precision adjustments propagate too. */
+ for (a = adj_precision; a; a = a->next)
+ {
+ printf ("\n /* %s:%d */\n s = %s;\n",
+ a->file, a->line, a->adjustment);
+ printf (" mode_unit_precision[E_%smode] = s;\n", a->mode->name);
+
+ for (m = a->mode->contained; m; m = m->next_cont)
+ {
+ switch (m->cl)
+ {
+ case MODE_COMPLEX_INT:
+ case MODE_COMPLEX_FLOAT:
+ printf (" mode_unit_precision[E_%smode] = s;\n", m->name);
+ break;
+
+ case MODE_VECTOR_BOOL:
+ /* Changes to BImode should not affect vector booleans. */
+ break;
+
+ case MODE_VECTOR_INT:
+ case MODE_VECTOR_FLOAT:
+ case MODE_VECTOR_FRACT:
+ case MODE_VECTOR_UFRACT:
+ case MODE_VECTOR_ACCUM:
+ case MODE_VECTOR_UACCUM:
+ printf (" mode_unit_precision[E_%smode] = %d*s;\n",
+ m->name, m->ncomponents);
+ break;
+
+ default:
+ internal_error (
+ "mode %s is neither vector nor complex but contains %s",
+ m->name, a->mode->name);
+ /* NOTREACHED */
+ }
+ }
+ }
+
puts ("}");
}
diff --git a/gcc/machmode.def b/gcc/machmode.def
index 62e2ba10d45..343dabc1b2e 100644
--- a/gcc/machmode.def
+++ b/gcc/machmode.def
@@ -171,9 +171,10 @@ along with GCC; see the file COPYING3. If not see
ADJUST_FLOAT_FORMAT (MODE, EXPR);
ADJUST_IBIT (MODE, EXPR);
ADJUST_FBIT (MODE, EXPR);
- Arrange for the byte size, alignment, floating point format, ibit,
- or fbit of MODE to be adjustable at run time. EXPR will be executed
- once after processing all command line options, and should
+ ADJUST_PRECISION (MODE, EXPR);
+ Arrange for the byte size, alignment, floating point format, ibit, fbit
+ or precision mode of MODE to be adjustable at run time. EXPR will be
+ executed once after processing all command line options, and should
evaluate to the desired byte size, alignment, format, ibit or fbit.
Unlike a FORMAT argument, if you are adjusting a float format
diff --git a/gcc/machmode.h b/gcc/machmode.h
index f1865c1ef42..e4e0caf9abb 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -27,7 +27,7 @@ extern CONST_MODE_PRECISION poly_uint16_pod mode_precision[NUM_MACHINE_MODES];
extern const unsigned char mode_inner[NUM_MACHINE_MODES];
extern CONST_MODE_NUNITS poly_uint16_pod mode_nunits[NUM_MACHINE_MODES];
extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
-extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
+extern CONST_MODE_PRECISION unsigned short mode_unit_precision[NUM_MACHINE_MODES];
extern const unsigned char mode_next[NUM_MACHINE_MODES];
extern const unsigned char mode_wider[NUM_MACHINE_MODES];
extern const unsigned char mode_2xwider[NUM_MACHINE_MODES];
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