[gcc(refs/users/meissner/heads/work104)] Reset patches

[gcc(refs/users/meissner/heads/work104)] Reset patches

[Michael Meissner]

https://gcc.gnu.org/g:106c79872f7e9eca8a217f8c2bae8a65cf1e07fa

commit 106c79872f7e9eca8a217f8c2bae8a65cf1e07fa
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Jan 4 21:39:03 2023 -0500

    Reset patches

Diff:
---
 gcc/config/rs6000/rs6000.cc                 | 109 ++++++++++++----------------
 gcc/testsuite/gcc.target/powerpc/divic3-1.c |  18 -----
 gcc/testsuite/gcc.target/powerpc/divic3-2.c |  17 -----
 gcc/testsuite/gcc.target/powerpc/mulic3-1.c |  18 -----
 gcc/testsuite/gcc.target/powerpc/mulic3-2.c |  17 -----
 5 files changed, 47 insertions(+), 132 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 585faedc4e6..69fbd2e8779 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11145,6 +11145,26 @@ init_float128_ibm (machine_mode mode)
     }
 }
 
+/* Create a decl for either complex long double multiply or complex long double
+   divide when long double is IEEE 128-bit floating point.  We can't use
+   __multc3 and __divtc3 because the original long double using IBM extended
+   double used those names.  The complex multiply/divide functions are encoded
+   as builtin functions with a complex result and 4 scalar inputs.  */
+
+static void
+create_complex_muldiv (const char *name, built_in_function fncode, tree fntype)
+{
+  tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
+				      name, NULL_TREE);
+
+  set_builtin_decl (fncode, fndecl, true);
+
+  if (TARGET_DEBUG_BUILTIN)
+    fprintf (stderr, "create complex %s, fncode: %d\n", name, (int) fncode);
+
+  return;
+}
+
 /* Set up IEEE 128-bit floating point routines.  Use different names if the
    arguments can be passed in a vector register.  The historical PowerPC
    implementation of IEEE 128-bit floating point used _q_<op> for the names, so
@@ -11156,6 +11176,32 @@ init_float128_ieee (machine_mode mode)
 {
   if (FLOAT128_VECTOR_P (mode))
     {
+      static bool complex_muldiv_init_p = false;
+
+      /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble.  If
+	 we have clone or target attributes, this will be called a second
+	 time.  We want to create the built-in function only once.  */
+     if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p)
+       {
+	 complex_muldiv_init_p = true;
+	 built_in_function fncode_mul =
+	   (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+				- MIN_MODE_COMPLEX_FLOAT);
+	 built_in_function fncode_div =
+	   (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+				- MIN_MODE_COMPLEX_FLOAT);
+
+	 tree fntype = build_function_type_list (complex_long_double_type_node,
+						 long_double_type_node,
+						 long_double_type_node,
+						 long_double_type_node,
+						 long_double_type_node,
+						 NULL_TREE);
+
+	 create_complex_muldiv ("__mulkc3", fncode_mul, fntype);
+	 create_complex_muldiv ("__divkc3", fncode_div, fntype);
+       }
+
       set_optab_libfunc (add_optab, mode, "__addkf3");
       set_optab_libfunc (sub_optab, mode, "__subkf3");
       set_optab_libfunc (neg_optab, mode, "__negkf2");
@@ -28173,25 +28219,6 @@ rs6000_starting_frame_offset (void)
   return RS6000_STARTING_FRAME_OFFSET;
 }
 \f
-/* Internal function to return the built-in function id for the complex
-   multiply operation for a given mode.  */
-
-static inline built_in_function
-complex_multiply_builtin_code (machine_mode mode)
-{
-  return (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + mode
-			      - MIN_MODE_COMPLEX_FLOAT);
-}
-
-/* Internal function to return the built-in function id for the complex divide
-   operation for a given mode.  */
-
-static inline built_in_function
-complex_divide_builtin_code (machine_mode mode)
-{
-  return (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + mode
-			      - MIN_MODE_COMPLEX_FLOAT);
-}
 
 /* On 64-bit Linux and Freebsd systems, possibly switch the long double library
    function names from <foo>l to <foo>f128 if the default long double type is
@@ -28210,53 +28237,11 @@ complex_divide_builtin_code (machine_mode mode)
    only do this transformation if the __float128 type is enabled.  This
    prevents us from doing the transformation on older 32-bit ports that might
    have enabled using IEEE 128-bit floating point as the default long double
-   type.
-
-   We also use the TARGET_MANGLE_DECL_ASSEMBLER_NAME hook to change the
-   function names used for complex multiply and divide to the appropriate
-   names.  */
+   type.  */
 
 static tree
 rs6000_mangle_decl_assembler_name (tree decl, tree id)
 {
-  /* Handle complex multiply/divide.  For IEEE 128-bit, use __mulkc3 or
-     __divkc3 and for IBM 128-bit use __multc3 and __divtc3.  */
-  if (TARGET_FLOAT128_TYPE
-      && TREE_CODE (decl) == FUNCTION_DECL
-      && DECL_IS_UNDECLARED_BUILTIN (decl)
-      && DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL)
-    {
-      built_in_function id = DECL_FUNCTION_CODE (decl);
-      const char *newname = NULL;
-
-      if (id == complex_multiply_builtin_code (KCmode))
-	newname = "__mulkc3";
-
-      else if (id == complex_multiply_builtin_code (ICmode))
-	newname = "__multc3";
-
-      else if (id == complex_multiply_builtin_code (TCmode))
-	newname = (TARGET_IEEEQUAD) ? "__mulkc3" : "__multc3";
-
-      else if (id == complex_divide_builtin_code (KCmode))
-	newname = "__divkc3";
-
-      else if (id == complex_divide_builtin_code (ICmode))
-	newname = "__divtc3";
-
-      else if (id == complex_divide_builtin_code (TCmode))
-	newname = (TARGET_IEEEQUAD) ? "__divkc3" : "__divtc3";
-
-      if (newname)
-	{
-	  if (TARGET_DEBUG_BUILTIN)
-	    fprintf (stderr, "Map complex mul/div => %s\n", newname);
-
-	  return get_identifier (newname);
-	}
-    }
-
-  /* Map long double built-in functions if long double is IEEE 128-bit.  */
   if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
       && TREE_CODE (decl) == FUNCTION_DECL
       && DECL_IS_UNDECLARED_BUILTIN (decl)
diff --git a/gcc/testsuite/gcc.target/powerpc/divic3-1.c b/gcc/testsuite/gcc.target/powerpc/divic3-1.c
deleted file mode 100644
index 1cc6b1be904..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/divic3-1.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-require-effective-target longdouble128 } */
-/* { dg-require-effective-target ppc_float128_sw } */
-/* { dg-options "-O2 -mpower8-vector -mabi=ieeelongdouble -Wno-psabi" } */
-
-/* Check that complex divide generates the right call for __ibm128 when long
-   double is IEEE 128-bit floating point.  */
-
-typedef _Complex long double c_ibm128_t __attribute__((mode(__IC__)));
-
-void
-divide (c_ibm128_t *p, c_ibm128_t *q, c_ibm128_t *r)
-{
-  *p = *q / *r;
-}
-
-/* { dg-final { scan-assembler "bl __divtc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/divic3-2.c b/gcc/testsuite/gcc.target/powerpc/divic3-2.c
deleted file mode 100644
index 8ff342e0116..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/divic3-2.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-require-effective-target longdouble128 } */
-/* { dg-options "-O2 -mpower8-vector -mabi=ibmlongdouble -Wno-psabi" } */
-
-/* Check that complex divide generates the right call for __ibm128 when long
-   double is IBM 128-bit floating point.  */
-
-typedef _Complex long double c_ibm128_t __attribute__((mode(__TC__)));
-
-void
-divide (c_ibm128_t *p, c_ibm128_t *q, c_ibm128_t *r)
-{
-  *p = *q / *r;
-}
-
-/* { dg-final { scan-assembler "bl __divtc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulic3-1.c b/gcc/testsuite/gcc.target/powerpc/mulic3-1.c
deleted file mode 100644
index 4cd773c4b06..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/mulic3-1.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-require-effective-target longdouble128 } */
-/* { dg-require-effective-target ppc_float128_sw } */
-/* { dg-options "-O2 -mpower8-vector -mabi=ieeelongdouble -Wno-psabi" } */
-
-/* Check that complex multiply generates the right call for __ibm128 when long
-   double is IEEE 128-bit floating point.  */
-
-typedef _Complex long double c_ibm128_t __attribute__((mode(__IC__)));
-
-void
-multiply (c_ibm128_t *p, c_ibm128_t *q, c_ibm128_t *r)
-{
-  *p = *q * *r;
-}
-
-/* { dg-final { scan-assembler "bl __multc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulic3-2.c b/gcc/testsuite/gcc.target/powerpc/mulic3-2.c
deleted file mode 100644
index 36fe8bc3061..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/mulic3-2.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-require-effective-target longdouble128 } */
-/* { dg-options "-O2 -mpower8-vector -mabi=ibmlongdouble -Wno-psabi" } */
-
-/* Check that complex multiply generates the right call for __ibm128 when long
-   double is IBM 128-bit floating point.  */
-
-typedef _Complex long double c_ibm128_t __attribute__((mode(__TC__)));
-
-void
-multiply (c_ibm128_t *p, c_ibm128_t *q, c_ibm128_t *r)
-{
-  *p = *q * *r;
-}
-
-/* { dg-final { scan-assembler "bl __multc3" } } */

[gcc(refs/users/meissner/heads/work104)] Reset patches

[Michael Meissner]

https://gcc.gnu.org/g:58f9ef6739ee13698033ffbfb6cf8122e696aadf

commit 58f9ef6739ee13698033ffbfb6cf8122e696aadf
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Jan 4 21:40:30 2023 -0500

    Reset patches

Diff:
---
 gcc/config/rs6000/rs6000.cc |   4 +-
 gcc/config/rs6000/rs6000.md | 177 ++++++++++++++++++++++++++++++++------------
 2 files changed, 131 insertions(+), 50 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 69fbd2e8779..6ac3adcec6b 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11224,11 +11224,11 @@ init_float128_ieee (machine_mode mode)
       set_conv_libfunc (trunc_optab, SFmode, mode, "__trunckfsf2");
       set_conv_libfunc (trunc_optab, DFmode, mode, "__trunckfdf2");
 
-      set_conv_libfunc (trunc_optab, mode, IFmode, "__trunctfkf2");
+      set_conv_libfunc (sext_optab, mode, IFmode, "__trunctfkf2");
       if (mode != TFmode && FLOAT128_IBM_P (TFmode))
 	set_conv_libfunc (sext_optab, mode, TFmode, "__trunctfkf2");
 
-      set_conv_libfunc (sext_optab, IFmode, mode, "__extendkftf2");
+      set_conv_libfunc (trunc_optab, IFmode, mode, "__extendkftf2");
       if (mode != TFmode && FLOAT128_IBM_P (TFmode))
 	set_conv_libfunc (trunc_optab, TFmode, mode, "__extendkftf2");
 
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 203d0ba6a7f..3cae64a264a 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
 ; Iterator for 128-bit VSX types for pack/unpack
 (define_mode_iterator FMOVE128_VSX [V1TI KF])
 
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
 ; Whether a floating point move is ok, don't allow SD without hardware FP
 (define_mode_attr fmove_ok [(SF "")
 			    (DF "")
@@ -9155,65 +9161,106 @@
   "xxlor %x0,%x1,%x2"
   [(set_attr "type" "veclogical")])
 
-;; Float128 conversion functions.  We only define the 'conversions' between two
-;; formats that use the same representation.  We call the library function to
-;; convert between IEEE 128-bit and IBM 128-bit.  We can't do these moves by
-;; using a SUBREG before register allocation.  We set up the moves to prefer
-;; the output register being the same as the input register, which would enable
-;; the move to be deleted completely.
-(define_insn_and_split "extendkftf2"
-  [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
-	(float_extend:TF (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
-  "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+;; Float128 conversion functions.  These expand to library function calls.
+;; We use expand to convert from IBM double double to IEEE 128-bit
+;; and trunc for the opposite.
+(define_expand "extendiftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
 {
-  operands[2] = gen_lowpart (TFmode, operands[1]);
-}
-  [(set_attr "type" "veclogical")])
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
 
-(define_insn_and_split "trunctfkf2"
-  [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
-	(float_truncate:KF (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
-  "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+(define_expand "extendifkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_extend:KF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
 {
-  operands[2] = gen_lowpart (KFmode, operands[1]);
-}
-  [(set_attr "type" "veclogical")])
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "extendtfkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "extendtfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunciftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "truncifkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_truncate:KF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunckftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunctfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
 
-(define_insn_and_split "extendtfif2"
-  [(set (match_operand:IF 0 "gpc_reg_operand" "=wa,wa,r,r")
-	(float_extend:IF (match_operand:TF 1 "gpc_reg_operand" "0,wa,0,r")))]
-  "TARGET_HARD_FLOAT && FLOAT128_IBM_P (TFmode)"
+(define_insn_and_split "*extend<mode>tf2_internal"
+  [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
+	(float_extend:TF
+	 (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+   "TARGET_FLOAT128_TYPE
+    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+  [(set (match_dup 0) (match_dup 2))]
 {
-  operands[2] = gen_lowpart (IFmode, operands[1]);
-}
-  [(set_attr "num_insns" "2")
-   (set_attr "length" "8")])
+  operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
+})
 
-(define_insn_and_split "extendiftf2"
-  [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa,r,r")
-	(float_extend:TF (match_operand:IF 1 "gpc_reg_operand" "0,wa,0,r")))]
-  "TARGET_HARD_FLOAT && FLOAT128_IBM_P (TFmode)"
+(define_insn_and_split "*extendtf<mode>2_internal"
+  [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+	(float_extend:IFKF
+	 (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+   "TARGET_FLOAT128_TYPE
+    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+  [(set (match_dup 0) (match_dup 2))]
 {
-  operands[2] = gen_lowpart (TFmode, operands[1]);
-}
-  [(set_attr "num_insns" "2")
-   (set_attr "length" "8")])
+  operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
 
 \f
 ;; Reload helper functions used by rs6000_secondary_reload.  The patterns all
@@ -14936,6 +14983,40 @@
   [(set_attr "type" "vecfloat")
    (set_attr "size" "128")])
 
+;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
+;; point is a simple copy.
+(define_insn_and_split "extendkftf2"
+  [(set (match_operand:TF 0 "vsx_register_operand" "=wa,?wa")
+	(float_extend:TF (match_operand:KF 1 "vsx_register_operand" "0,wa")))]
+  "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+  "@
+   #
+   xxlor %x0,%x1,%x1"
+  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
+  [(const_int 0)]
+{
+  emit_note (NOTE_INSN_DELETED);
+  DONE;
+}
+  [(set_attr "type" "*,veclogical")
+   (set_attr "length" "0,4")])
+
+(define_insn_and_split "trunctfkf2"
+  [(set (match_operand:KF 0 "vsx_register_operand" "=wa,?wa")
+	(float_extend:KF (match_operand:TF 1 "vsx_register_operand" "0,wa")))]
+  "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+  "@
+   #
+   xxlor %x0,%x1,%x1"
+  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
+  [(const_int 0)]
+{
+  emit_note (NOTE_INSN_DELETED);
+  DONE;
+}
+  [(set_attr "type" "*,veclogical")
+   (set_attr "length" "0,4")])
+
 (define_insn "trunc<mode>df2_hw"
   [(set (match_operand:DF 0 "altivec_register_operand" "=v")
 	(float_truncate:DF