[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:e5103fa74ff213c3e5b0a06662e074dac1c88f32

commit e5103fa74ff213c3e5b0a06662e074dac1c88f32
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jan 6 20:33:55 2023 -0500

    Update ChangeLog.meissner.
    
    2023-01-06   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index ca8b890ea31..64cd2c02fb7 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,4 +1,63 @@
+==================== Patch #22, work104 branch ====================
+
+Update float 128-bit conversions, PR target/107299.
+
+This patch fixes two tests that are still failing when long double is IEEE
+128-bit after the previous 2 patches for PR target/107299 have been applied.
+The tests are:
+
+	gcc.target/powerpc/convert-fp-128.c
+	gcc.target/powerpc/pr85657-3.c
+
+This patch is a rewrite of the patch submitted on August 18th:
+
+| https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599988.html
+
+This patch reworks the conversions between 128-bit binary floating point types.
+Previously, we would call rs6000_expand_float128_convert to do all conversions.
+Now, we only define the conversions between the same representation that turn
+into a NOP.  The appropriate extend or truncate insn is generated, and after
+register allocation, it is converted to a move.
+
+This patch also fixes two places where we want to override the external name
+for the conversion function, and the wrong optab was used.  Previously,
+rs6000_expand_float128_convert would handle the move or generate the call as
+needed.  Now, it lets the machine independent code generate the call.  But if
+we use the machine independent code to generate the call, we need to update the
+name for two optabs where a truncate would be used in terms of converting
+between the modes.  This patch updates those two optabs.
+
+This patch was previously submitted on December 14th, 2022.  This patch changes
+one built-in function from a FLOAT_TRUNCATE to a FLOAT_EXTEND, which is needed
+by the previous patch to genmodes.cc to allow allow the same precision to be
+used for various modes.
+
+2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/107299
+	* config/rs6000/rs6000.cc (init_float128_ieee): Use the correct
+	float_extend or float_truncate optab based on how the machine converts
+	between IEEE 128-bit and IBM 128-bit.
+	* config/rs6000/rs6000.md (IFKF): Delete.
+	(IFKF_reg): Delete.
+	(extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM
+	128-bit.  Do not run if TFmode is IEEE 128-bit.
+	(extendifkf2): Delete.
+	(extendtfkf2): Delete.
+	(extendtfif2): Delete.
+	(trunciftf2): Delete.
+	(truncifkf2): Delete.
+	(trunckftf2): Delete.
+	(extendkftf2): Implement conversion of IEEE 128-bit types as a move.
+	(trunctfif2): Delete.
+	(trunctfkf2): Implement conversion of IEEE 128-bit types as a move.
+	(extend<mode>tf2_internal): Delete.
+	(extendtf<mode>2_internal): Delete.
+
 ==================== Patch #21, work104 branch ====================
+
 Allow for FP types with the same precision.
 
 This patch allows 2 or more floating point modes to have the same precision.
@@ -53,6 +112,7 @@ gcc/
 	* machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document.
 
 ==================== Patch #20, work104 branch ====================
+
 Rework 128-bit complex multiply and divide.
 
 This patch reworks how the complex multiply and divide built-in functions are
@@ -123,6 +183,7 @@ gcc/testsuite/
 	* gcc.target/powerpc/mulic3-2.c: Likewise.
 
 ==================== Basline ====================
+
 2023-01-03   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:83ddf9ab0f568aa1d829c6517d2599f317282b4d

commit 83ddf9ab0f568aa1d829c6517d2599f317282b4d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jan 10 15:04:57 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 132 ++++++++++++++++---------------------------------
 1 file changed, 43 insertions(+), 89 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 813dfb7a38a..23f2034334f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,53 +1,4 @@
-==================== Patch #26, work104 branch ====================
-
-Undo part of last patch.
-
-2022-01-10   Michael Meissner  <meissner@linux.ibm.com>
-
-	* config/rs6000/rs6000.cc: Revert last patch.
-	* config/rs6000/rs6000.opt: Likewise.
-	* genmodes.cc (emit_mode_adjustments): Fix complex mode_unit_precision
-	if precision is adjusted.
-
-==================== Patch #25, work104 branch ====================
-
-Tweak setting precision.
-
-2022-01-09   Michael Meissner  <meissner@linux.ibm.com>
-
-	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Make unqiue
-	float128 precision a user switch.
-	* config/rs6000/rs6000.opt (-munique-float128-precision): Likewise.
-	* genmodes.cc (emit_mode_adjustments): Set mode_precision as well as
-	mode_unit_precision.
-
-==================== Patch #24, work104 branch ====================
-
-Use unique precisions for 128-bit floating point on Fortran.
-
-2022-01-09   Michael Meissner  <meissner@linux.ibm.com>
-
-gcc/
-
-	* config/rs6000/rs6000-modes.def (IFmode): If we are compiling for
-	Fortran, use unqiue precisions for 128-bit floating point.
-	(KFmode): Likewise.
-	(TFmode): Likewise.
-	* config/rs6000/rs6000.opt (UNIQUE_FLOAT128_PRECISION): New target
-	variable.
-	* genmodes.cc (struct mode_data): Add field for adjusting precision.
-	(blank_mode): Likewise.
-	(need_precision_adj): New variable to support ADJUST_PRECISION.
-	(ADJUST_PRECISION): New macro.
-	(mode_unit_precision_inline): Add support for ADJUST_PRECISION.
-	(emit_insn_modes_h): Likewise.
-	(emit_mode_precision): Likewise.
-	(emit_mode_unit_precision): Likewise.
-	(emit_mode_adjustments): Likewise.
-	* machmode.def (ADJUST_PRECISION): Document usage.
-	* machmode.h (mode_unit_precision): Add support for ADJUST_PRECISION.
-
-==================== Patch #23, work104 branch ====================
+==================== Patch #33, work104 branch ====================
 
 PR target/107299
 
@@ -58,7 +9,7 @@ gcc/ChangeLog:
         * tree.cc (build_common_tree_nodes): Remove workaround for rs6000
         KFmode.
 
-==================== Patch #22, work104 branch ====================
+==================== Patch #32, work104 branch ====================
 
 Update float 128-bit conversions, PR target/107299.
 
@@ -92,7 +43,7 @@ one built-in function from a FLOAT_TRUNCATE to a FLOAT_EXTEND, which is needed
 by the previous patch to genmodes.cc to allow allow the same precision to be
 used for various modes.
 
-2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+2022-01-10   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/
 
@@ -116,62 +67,65 @@ gcc/
 	(extend<mode>tf2_internal): Delete.
 	(extendtf<mode>2_internal): Delete.
 
-==================== Patch #21, work104 branch ====================
+==================== Patch #31, work104 branch ====================
 
-Allow for FP types with the same precision.
+Improve PowerPC 128-bit floating point precision support.
 
-This patch allows 2 or more floating point modes to have the same precision.
-The PowerPC has 3 128-bit floating point types (IFmode that uses the IBM
-extended double format, KFmode that uses the IEEE 128-bit format, and TFmode
-that can eithe use the IBM extended format or the IEEE 128-bit format depending
-on the switches used when compiling the module and switches used to configure
-the compiler.
+This patch improves the code for the 3 PowerPC 128-bit floating point types.
 
-In the past, we needed to use 3 different precisions to separate these types.
+There are two main additions with this patch:
 
-This patch adds a new macro (FRACTIONAL_FLOAT_MODE_NO_WIDEN) that a machine
-description can use to say this particular mode is not a standard floating point
-mode.  The machine independent part of the compiler will not automatically widen
-other floating point modes to these special modes.  In the case of the PowerPC,
-IFmode and KFmode use this no warn mode creation, while TFmode uses the normal
-creation.
+    1)	Allow the backend to adjust the precision of the 3 types at runtime.
+	This allows us to use the same precision for both long double and
+	for either __float128 or __ibm128 types.  By having the same precision,
+	it makes it easier for the machine independent part of the compiler to
+	realize that these modes are talking to the same representation.
+
+    2)	Prevent __ibm128 and __float128 from being considered in the automatic
+	widening that the compiler does.  This way, you don't have the
+	possibility that IFmode (__ibm128) will be widened to TFmode or KFmode,
+	even there is hardware to support the IEEE 128-bit operations.
+
+Fortran depends on the current precision values to identify whether the
+current floating point type is IBM extended double or IEEE 128-bit.  While it
+might be nice to fix this in the future so that can just set the precision of
+all 3 modes to be 128, I decided to not make this incompatible change and break
+Fortran.
 
 I also moved changing the TFmode format from ieee to ibm to rs6000-modes.def
 from rs6000.cc.
 
-We used to have an include file defining the special precisions used for the 3
-modes, and this include file is now deleted.
-
-2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+2022-01-10   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/
 
-	* config/rs6000/rs6000-modes.def (rs6000-modes.h): Remove inclusion.
-	(IFmode): Rework set up to use FRACTIONAL_FLOAT_MODE_NO_WIDEN.  Use 128
-	as the precision.
+	* config/rs6000/rs6000-modes.def (IFmode): Rework to use
+	FRACTIONAL_FLOAT_MODE_NO_WIDEN.  Adjust the precision if long double
+	uses the same representation.
 	(KFmode): Likewise.
-	(TFmode): Set the precision to 128.  Adjust the format of TFmode based
-	on the -mabi={ibm,ieee}longdouble option.
-	* config/rs6000/rs6000-modes.h: Delete.
-	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Use 128
-	bits as the precision for 128-bit float, instead of using a special
-	values for the 3 different 128-bit FP modes.  Move resetting the format
-	of TFmode to rs6000-modes.def.
-	* config/rs6000/rs6000.h (rs6000-modes.h): Remove inclusion.
-	* config/rs6000/t-rs6000 (TM_H): Don't add rs6000-modes.h.
+	(TFmode): Rework to use FRACTIONAL_FLOAT_MODE_NO_WIDEN.  Adjust the
+	format of TFmode based on the -mabi={ibm,ieee}longdouble option.
 	* expr.cc (convert_mode_scalar): Don't abort if we are converting
 	floating point modes that are the same precision but use different
 	encodings.
-	* genmodes.cc (struct mode_data): Add normal_widen field.
+	* genmodes.cc (struct mode_data): Add support for no widening and
+	adjusting precision.
 	(blank_mode): Likewise.
-	(FRACTIONAL_FLOAT_MODE): Add support for NO_WIDEN capability.
+	(FRACTIONAL_FLOAT_MODE): Add support for no widening capability.
 	(FRACTIONAL_FLOAT_MODE_NO_WIDEN): New macro.
-	(make_float_mode): Add support for NO_WIDEN capability.
+	(make_float_mode): Add support for no widening capability.
 	(cmp_modes): Likewise.
-	(emit_mode_wider): Likewise.
+	(emit_mode_unit_precision_inline): Add support for adjusting the
+	precision.
+	(emit_insn_modes_h): Likewise.
+	(emit_mode_wider): Add support for no widening capability.
+	(emit_mode_unit_precision): Add support for adjusting the precision.
+	(emit_mode_adjustments): Likewise.
 	* machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document.
+	* machmode.h (mode_unit_precision): Add suport for adjusting the
+	precision.
 
-==================== Patch #20, work104 branch ====================
+==================== Patch #30, work104 branch ====================
 
 Rework 128-bit complex multiply and divide.
 
@@ -221,7 +175,7 @@ Once all 3 patches have been applied, we can once again build GCC when long
 double is IEEE 128-bit.  There were no other regressions with these patches.
 Can I check these patches into the trunk?
 
-2023-01-06   Michael Meissner  <meissner@linux.ibm.com>
+2023-01-10   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:f2a38b7bb46edabf3e659cf15f90482e1b4a7fc6

commit f2a38b7bb46edabf3e659cf15f90482e1b4a7fc6
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jan 10 01:02:31 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 525dd331b52..813dfb7a38a 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== Patch #26, work104 branch ====================
+
+Undo part of last patch.
+
+2022-01-10   Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.cc: Revert last patch.
+	* config/rs6000/rs6000.opt: Likewise.
+	* genmodes.cc (emit_mode_adjustments): Fix complex mode_unit_precision
+	if precision is adjusted.
+
 ==================== Patch #25, work104 branch ====================
 
 Tweak setting precision.

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:8b0d5796b5d2a13db67f948510fd0cfd2ec0b5a5

commit 8b0d5796b5d2a13db67f948510fd0cfd2ec0b5a5
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Jan 9 23:19:58 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 74bfbe3c8b6..525dd331b52 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,15 @@
+==================== Patch #25, work104 branch ====================
+
+Tweak setting precision.
+
+2022-01-09   Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Make unqiue
+	float128 precision a user switch.
+	* config/rs6000/rs6000.opt (-munique-float128-precision): Likewise.
+	* genmodes.cc (emit_mode_adjustments): Set mode_precision as well as
+	mode_unit_precision.
+
 ==================== Patch #24, work104 branch ====================
 
 Use unique precisions for 128-bit floating point on Fortran.

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:bd09529f1b5a5e8de312687dc8472686523fd276

commit bd09529f1b5a5e8de312687dc8472686523fd276
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Jan 9 15:42:04 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 39ffe25010b..74bfbe3c8b6 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,29 @@
+==================== Patch #24, work104 branch ====================
+
+Use unique precisions for 128-bit floating point on Fortran.
+
+2022-01-09   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-modes.def (IFmode): If we are compiling for
+	Fortran, use unqiue precisions for 128-bit floating point.
+	(KFmode): Likewise.
+	(TFmode): Likewise.
+	* config/rs6000/rs6000.opt (UNIQUE_FLOAT128_PRECISION): New target
+	variable.
+	* genmodes.cc (struct mode_data): Add field for adjusting precision.
+	(blank_mode): Likewise.
+	(need_precision_adj): New variable to support ADJUST_PRECISION.
+	(ADJUST_PRECISION): New macro.
+	(mode_unit_precision_inline): Add support for ADJUST_PRECISION.
+	(emit_insn_modes_h): Likewise.
+	(emit_mode_precision): Likewise.
+	(emit_mode_unit_precision): Likewise.
+	(emit_mode_adjustments): Likewise.
+	* machmode.def (ADJUST_PRECISION): Document usage.
+	* machmode.h (mode_unit_precision): Add support for ADJUST_PRECISION.
+
 ==================== Patch #23, work104 branch ====================
 
 PR target/107299

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:af8e2eee9629686b4cb4643508eb78fc2ed6ade8

commit af8e2eee9629686b4cb4643508eb78fc2ed6ade8
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Jan 9 14:47:51 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 64cd2c02fb7..39ffe25010b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== Patch #23, work104 branch ====================
+
+PR target/107299
+
+2022-12-27  Kewen Lin  <linkw@linux.ibm.com>
+
+gcc/ChangeLog:
+
+        * tree.cc (build_common_tree_nodes): Remove workaround for rs6000
+        KFmode.
+
 ==================== Patch #22, work104 branch ====================
 
 Update float 128-bit conversions, PR target/107299.

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:26c6a5428e8b0485c28c3fa83777ed51e92cb357

commit 26c6a5428e8b0485c28c3fa83777ed51e92cb357
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jan 6 20:17:19 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 111 ++++++++++---------------------------------------
 1 file changed, 22 insertions(+), 89 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 792d8983a7b..ca8b890ea31 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,15 +1,27 @@
-==================== Patch #10, work104 branch ====================
-Fixup __ibm128 to long double conversion.
+==================== Patch #21, work104 branch ====================
+Allow for FP types with the same precision.
 
-2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+This patch allows 2 or more floating point modes to have the same precision.
+The PowerPC has 3 128-bit floating point types (IFmode that uses the IBM
+extended double format, KFmode that uses the IEEE 128-bit format, and TFmode
+that can eithe use the IBM extended format or the IEEE 128-bit format depending
+on the switches used when compiling the module and switches used to configure
+the compiler.
 
-gcc/
+In the past, we needed to use 3 different precisions to separate these types.
 
-	* config/rs6000/rs6000.md (init_float128_ieee): Update code for
-	conversion used in reworking using 128 bit precision.
+This patch adds a new macro (FRACTIONAL_FLOAT_MODE_NO_WIDEN) that a machine
+description can use to say this particular mode is not a standard floating point
+mode.  The machine independent part of the compiler will not automatically widen
+other floating point modes to these special modes.  In the case of the PowerPC,
+IFmode and KFmode use this no warn mode creation, while TFmode uses the normal
+creation.
 
-==================== Patch #9, work104 branch ====================
-Allow for FP types with the same precision.
+I also moved changing the TFmode format from ieee to ibm to rs6000-modes.def
+from rs6000.cc.
+
+We used to have an include file defining the special precisions used for the 3
+modes, and this include file is now deleted.
 
 2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
 
@@ -40,86 +52,7 @@ gcc/
 	(emit_mode_wider): Likewise.
 	* machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document.
 
-==================== Patch #4, work104 branch ====================
-Update float 128-bit conversions, PR target/107299.
-
-This patch fixes two tests that are still failing when long double is IEEE
-128-bit after the previous 2 patches for PR target/107299 have been applied.
-The tests are:
-
-	gcc.target/powerpc/convert-fp-128.c
-	gcc.target/powerpc/pr85657-3.c
-
-This patch is a rewrite of the patch submitted on August 18th:
-
-| https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599988.html
-
-This patch reworks the conversions between 128-bit binary floating point types.
-Previously, we would call rs6000_expand_float128_convert to do all conversions.
-Now, we only define the conversions between the same representation that turn
-into a NOP.  The appropriate extend or truncate insn is generated, and after
-register allocation, it is converted to a move.
-
-This patch also fixes two places where we want to override the external name
-for the conversion function, and the wrong optab was used.  Previously,
-rs6000_expand_float128_convert would handle the move or generate the call as
-needed.  Now, it lets the machine independent code generate the call.  But if
-we use the machine independent code to generate the call, we need to update the
-name for two optabs where a truncate would be used in terms of converting
-between the modes.  This patch updates those two optabs.
-
-I tested this patch on:
-
-    1)	LE Power10 using --with-cpu=power10 --with-long-double-format=ieee
-    2)	LE Power10 using --with-cpu=power10 --with-long-double-format=ibm
-    3)	LE Power9  using --with-cpu=power9  --with-long-double-format=ibm
-    4)	BE Power8  using --with-cpu=power8  --with-long-double-format=ibm
-
-In the past I have also tested this exact patch on the following systems:
-
-    1)	LE Power10 using --with-cpu=power9  --with-long-double-format=ibm
-    2)	LE Power10 using --with-cpu=power8  --with-long-double-format=ibm
-    3)	LE Power10 using --with-cpu=power10 --with-long-double-format=ibm
-
-There were no regressions in the bootstrap process or running the tests (after
-applying all 3 patches for PR target/107299).  Can I check this patch into the
-trunk?
-
-2022-01-04   Michael Meissner  <meissner@linux.ibm.com>
-
-gcc/
-
-	PR target/107299
-	* config/rs6000/rs6000.cc (init_float128_ieee): Use the correct
-	float_extend or float_truncate optab based on how the machine converts
-	between IEEE 128-bit and IBM 128-bit.
-	* config/rs6000/rs6000.md (IFKF): Delete.
-	(IFKF_reg): Delete.
-	(extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM
-	128-bit.  Do not run if TFmode is IEEE 128-bit.
-	(extendifkf2): Delete.
-	(extendtfkf2): Delete.
-	(extendtfif2): Delete.
-	(trunciftf2): Delete.
-	(truncifkf2): Delete.
-	(trunckftf2): Delete.
-	(extendkftf2): Implement conversion of IEEE 128-bit types as a move.
-	(trunctfif2): Delete.
-	(trunctfkf2): Implement conversion of IEEE 128-bit types as a move.
-	(extend<mode>tf2_internal): Delete.
-	(extendtf<mode>2_internal): Delete.
-
-==================== Patch #2, work104 branch ====================
-PR target/107299
-
-2022-12-27  Kewen Lin  <linkw@linux.ibm.com>
-
-gcc/ChangeLog:
-
-        * tree.cc (build_common_tree_nodes): Remove workaround for rs6000
-        KFmode.
-
-==================== Patch #1, work104 branch ====================
+==================== Patch #20, work104 branch ====================
 Rework 128-bit complex multiply and divide.
 
 This patch reworks how the complex multiply and divide built-in functions are
@@ -168,7 +101,7 @@ Once all 3 patches have been applied, we can once again build GCC when long
 double is IEEE 128-bit.  There were no other regressions with these patches.
 Can I check these patches into the trunk?
 
-2023-01-04   Michael Meissner  <meissner@linux.ibm.com>
+2023-01-06   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:d3f82b07138fd8108397dc07615f7308f1b86740

commit d3f82b07138fd8108397dc07615f7308f1b86740
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jan 6 18:14:21 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 39705d5de84..792d8983a7b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,13 @@
+==================== Patch #10, work104 branch ====================
+Fixup __ibm128 to long double conversion.
+
+2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.md (init_float128_ieee): Update code for
+	conversion used in reworking using 128 bit precision.
+
 ==================== Patch #9, work104 branch ====================
 Allow for FP types with the same precision.

[gcc(refs/users/meissner/heads/work104)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:b0ffece083991da9be07e7395155294621b2ac61

commit b0ffece083991da9be07e7395155294621b2ac61
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jan 6 15:10:55 2023 -0500

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 182 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 182 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6369ed95581..39705d5de84 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,185 @@
+==================== Patch #9, work104 branch ====================
+Allow for FP types with the same precision.
+
+2022-01-06   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-modes.def (rs6000-modes.h): Remove inclusion.
+	(IFmode): Rework set up to use FRACTIONAL_FLOAT_MODE_NO_WIDEN.  Use 128
+	as the precision.
+	(KFmode): Likewise.
+	(TFmode): Set the precision to 128.  Adjust the format of TFmode based
+	on the -mabi={ibm,ieee}longdouble option.
+	* config/rs6000/rs6000-modes.h: Delete.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Use 128
+	bits as the precision for 128-bit float, instead of using a special
+	values for the 3 different 128-bit FP modes.  Move resetting the format
+	of TFmode to rs6000-modes.def.
+	* config/rs6000/rs6000.h (rs6000-modes.h): Remove inclusion.
+	* config/rs6000/t-rs6000 (TM_H): Don't add rs6000-modes.h.
+	* expr.cc (convert_mode_scalar): Don't abort if we are converting
+	floating point modes that are the same precision but use different
+	encodings.
+	* genmodes.cc (struct mode_data): Add normal_widen field.
+	(blank_mode): Likewise.
+	(FRACTIONAL_FLOAT_MODE): Add support for NO_WIDEN capability.
+	(FRACTIONAL_FLOAT_MODE_NO_WIDEN): New macro.
+	(make_float_mode): Add support for NO_WIDEN capability.
+	(cmp_modes): Likewise.
+	(emit_mode_wider): Likewise.
+	* machmode.def (FRACTIONAL_FLOAT_MODE_NO_WIDEN): Document.
+
+==================== Patch #4, work104 branch ====================
+Update float 128-bit conversions, PR target/107299.
+
+This patch fixes two tests that are still failing when long double is IEEE
+128-bit after the previous 2 patches for PR target/107299 have been applied.
+The tests are:
+
+	gcc.target/powerpc/convert-fp-128.c
+	gcc.target/powerpc/pr85657-3.c
+
+This patch is a rewrite of the patch submitted on August 18th:
+
+| https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599988.html
+
+This patch reworks the conversions between 128-bit binary floating point types.
+Previously, we would call rs6000_expand_float128_convert to do all conversions.
+Now, we only define the conversions between the same representation that turn
+into a NOP.  The appropriate extend or truncate insn is generated, and after
+register allocation, it is converted to a move.
+
+This patch also fixes two places where we want to override the external name
+for the conversion function, and the wrong optab was used.  Previously,
+rs6000_expand_float128_convert would handle the move or generate the call as
+needed.  Now, it lets the machine independent code generate the call.  But if
+we use the machine independent code to generate the call, we need to update the
+name for two optabs where a truncate would be used in terms of converting
+between the modes.  This patch updates those two optabs.
+
+I tested this patch on:
+
+    1)	LE Power10 using --with-cpu=power10 --with-long-double-format=ieee
+    2)	LE Power10 using --with-cpu=power10 --with-long-double-format=ibm
+    3)	LE Power9  using --with-cpu=power9  --with-long-double-format=ibm
+    4)	BE Power8  using --with-cpu=power8  --with-long-double-format=ibm
+
+In the past I have also tested this exact patch on the following systems:
+
+    1)	LE Power10 using --with-cpu=power9  --with-long-double-format=ibm
+    2)	LE Power10 using --with-cpu=power8  --with-long-double-format=ibm
+    3)	LE Power10 using --with-cpu=power10 --with-long-double-format=ibm
+
+There were no regressions in the bootstrap process or running the tests (after
+applying all 3 patches for PR target/107299).  Can I check this patch into the
+trunk?
+
+2022-01-04   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/107299
+	* config/rs6000/rs6000.cc (init_float128_ieee): Use the correct
+	float_extend or float_truncate optab based on how the machine converts
+	between IEEE 128-bit and IBM 128-bit.
+	* config/rs6000/rs6000.md (IFKF): Delete.
+	(IFKF_reg): Delete.
+	(extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM
+	128-bit.  Do not run if TFmode is IEEE 128-bit.
+	(extendifkf2): Delete.
+	(extendtfkf2): Delete.
+	(extendtfif2): Delete.
+	(trunciftf2): Delete.
+	(truncifkf2): Delete.
+	(trunckftf2): Delete.
+	(extendkftf2): Implement conversion of IEEE 128-bit types as a move.
+	(trunctfif2): Delete.
+	(trunctfkf2): Implement conversion of IEEE 128-bit types as a move.
+	(extend<mode>tf2_internal): Delete.
+	(extendtf<mode>2_internal): Delete.
+
+==================== Patch #2, work104 branch ====================
+PR target/107299
+
+2022-12-27  Kewen Lin  <linkw@linux.ibm.com>
+
+gcc/ChangeLog:
+
+        * tree.cc (build_common_tree_nodes): Remove workaround for rs6000
+        KFmode.
+
+==================== Patch #1, work104 branch ====================
+Rework 128-bit complex multiply and divide.
+
+This patch reworks how the complex multiply and divide built-in functions are
+done.  Previously we created built-in declarations for doing long double complex
+multiply and divide when long double is IEEE 128-bit.  The old code also did not
+support __ibm128 complex multiply and divide if long double is IEEE 128-bit.
+
+In terms of history, I wrote the original code just as I was starting to test
+GCC on systems where IEEE 128-bit long double was the default.  At the time, we
+had not yet started mangling the built-in function names as a way to bridge
+going from a system with 128-bit IBM long double to 128-bin IEEE long double.
+
+The original code depends on there only being two 128-bit types invovled.  With
+the next patch in this series, this assumption will no longer be true.  When
+long double is IEEE 128-bit, there will be 2 IEEE 128-bit types (one for the
+explicit __float128/_Float128 type and one for long double).
+
+The problem is we cannot create two separate built-in functions that resolve to
+the same name.  This is a requirement of add_builtin_function and the C front
+end.  That means for the 3 possible modes (IFmode, KFmode, and TFmode), you can
+only use 2 of them.
+
+This code does not create the built-in declaration with the changed name.
+Instead, it uses the TARGET_MANGLE_DECL_ASSEMBLER_NAME hook to change the name
+before it is written out to the assembler file like it now does for all of the
+other long double built-in functions.
+
+When I wrote these patches, I discovered that __ibm128 complex multiply and
+divide had originally not been supported if long double is IEEE 128-bit as it
+would generate calls to __mulic3 and __divic3.  I added tests in the testsuite
+to verify that the correct name (i.e. __multc3 and __divtc3) is used in this
+case.
+
+I had previously sent this patch out on November 1st.  Compared to that version,
+this version no longer disables the special mapping when you are building
+libgcc, as it turns out we don't need it.
+
+I tested all 3 patchs for PR target/107299 on:
+
+    1)	LE Power10 using --with-cpu=power10 --with-long-double-format=ieee
+    2)	LE Power10 using --with-cpu=power10 --with-long-double-format=ibm
+    3)	LE Power9  using --with-cpu=power9  --with-long-double-format=ibm
+    4)	BE Power8  using --with-cpu=power8  --with-long-double-format=ibm
+
+Once all 3 patches have been applied, we can once again build GCC when long
+double is IEEE 128-bit.  There were no other regressions with these patches.
+Can I check these patches into the trunk?
+
+2023-01-04   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/107299
+	* config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
+	(init_float128_ieee): Delete code to switch complex multiply and divide
+	for long double.
+	(complex_multiply_builtin_code): New helper function.
+	(complex_divide_builtin_code): Likewise.
+	(rs6000_mangle_decl_assembler_name): Add support for mangling the name
+	of complex 128-bit multiply and divide built-in functions.
+
+gcc/testsuite/
+
+	PR target/107299
+	* gcc.target/powerpc/divic3-1.c: New test.
+	* gcc.target/powerpc/divic3-2.c: Likewise.
+	* gcc.target/powerpc/mulic3-1.c: Likewise.
+	* gcc.target/powerpc/mulic3-2.c: Likewise.
+
+==================== Basline ====================
 2023-01-03   Michael Meissner  <meissner@linux.ibm.com>
 
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