[gcc(refs/users/meissner/heads/work107)] Revert patches

[gcc(refs/users/meissner/heads/work107)] Revert patches

[Michael Meissner]

https://gcc.gnu.org/g:146fffb36338595317131fc3d3371133baabb484

commit 146fffb36338595317131fc3d3371133baabb484
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jan 24 23:56:28 2023 -0500

    Revert patches

Diff:
---
 gcc/config/rs6000/rs6000.cc |   2 +-
 gcc/config/rs6000/rs6000.md | 181 +++++++++++++++++++++++++++++++-------------
 2 files changed, 130 insertions(+), 53 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index e108065a468..7e76c37fdab 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11188,7 +11188,7 @@ init_float128_ieee (machine_mode mode)
       if (mode != TFmode && FLOAT128_IBM_P (TFmode))
 	set_conv_libfunc (sext_optab, mode, TFmode, "__trunctfkf2");
 
-      set_conv_libfunc (sext_optab, IFmode, mode, "__extendkftf2");
+      set_conv_libfunc (trunc_optab, IFmode, mode, "__extendkftf2");
       if (mode != TFmode && FLOAT128_IBM_P (TFmode))
 	set_conv_libfunc (trunc_optab, TFmode, mode, "__extendkftf2");
 
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 7decb7f7974..4a7812fa592 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
 ; Iterator for 128-bit VSX types for pack/unpack
 (define_mode_iterator FMOVE128_VSX [V1TI KF])
 
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
 ; Whether a floating point move is ok, don't allow SD without hardware FP
 (define_mode_attr fmove_ok [(SF "")
 			    (DF "")
@@ -633,7 +639,6 @@
 (define_code_iterator any_extend	[sign_extend zero_extend])
 (define_code_iterator any_fix		[fix unsigned_fix])
 (define_code_iterator any_float		[float unsigned_float])
-(define_code_iterator any_fp_cvt	[float_extend float_truncate])
 
 (define_code_attr u  [(sign_extend	"")
 		      (zero_extend	"u")
@@ -659,9 +664,6 @@
 		       (float		"")
 		       (unsigned_float	"uns")])
 
-(define_code_attr fp_cvt [(float_extend		"extend")
-			  (float_truncate	"trunc")])
-
 ; Various instructions that come in SI and DI forms.
 ; A generic w/d attribute, for things like cmpw/cmpd.
 (define_mode_attr wd [(QI    "b")
@@ -9159,65 +9161,106 @@
   "xxlor %x0,%x1,%x2"
   [(set_attr "type" "veclogical")])
 
-;; Float128 conversion functions.  We only define the 'conversions' between two
-;; formats that use the same representation.  We call the library function to
-;; convert between IEEE 128-bit and IBM 128-bit.  We can't do these moves by
-;; using a SUBREG before register allocation.  We set up the moves to prefer
-;; the output register being the same as the input register, which would enable
-;; the move to be deleted completely.
-(define_insn_and_split "<fp_cvt>kftf2"
-  [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
-	(any_fp_cvt:TF (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
-  "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+;; Float128 conversion functions.  These expand to library function calls.
+;; We use expand to convert from IBM double double to IEEE 128-bit
+;; and trunc for the opposite.
+(define_expand "extendiftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
 {
-  operands[2] = gen_lowpart (TFmode, operands[1]);
-}
-  [(set_attr "type" "veclogical")])
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
 
-(define_insn_and_split "<fp_cvt>tfkf2"
-  [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
-	(any_fp_cvt:KF (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
-  "TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (TFmode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+(define_expand "extendifkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_extend:KF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
 {
-  operands[2] = gen_lowpart (KFmode, operands[1]);
-}
-  [(set_attr "type" "veclogical")])
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "extendtfkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
 
-(define_insn_and_split "<fp_cvt>iftf2"
-  [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa,r,r")
-	(any_fp_cvt:TF (match_operand:IF 1 "gpc_reg_operand" "0,wa,0,r")))]
-  "TARGET_HARD_FLOAT && FLOAT128_IBM_P (TFmode)"
+(define_expand "extendtfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunciftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "truncifkf2"
+  [(set (match_operand:KF 0 "gpc_reg_operand")
+	(float_truncate:KF (match_operand:IF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunckftf2"
+  [(set (match_operand:TF 0 "gpc_reg_operand")
+	(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_expand "trunctfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
+(define_insn_and_split "*extend<mode>tf2_internal"
+  [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
+	(float_extend:TF
+	 (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+   "TARGET_FLOAT128_TYPE
+    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+  [(set (match_dup 0) (match_dup 2))]
 {
-  operands[2] = gen_lowpart (TFmode, operands[1]);
-}
-  [(set_attr "num_insns" "2")
-   (set_attr "length" "8")])
+  operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
+})
 
-(define_insn_and_split "<fp_cvt>tfif2"
-  [(set (match_operand:IF 0 "gpc_reg_operand" "=wa,wa,r,r")
-	(any_fp_cvt:IF (match_operand:TF 1 "gpc_reg_operand" "0,wa,0,r")))]
-  "TARGET_HARD_FLOAT && FLOAT128_IBM_P (TFmode)"
+(define_insn_and_split "*extendtf<mode>2_internal"
+  [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+	(float_extend:IFKF
+	 (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+   "TARGET_FLOAT128_TYPE
+    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
-  [(set (match_dup 0)
-	(match_dup 2))]
+  [(set (match_dup 0) (match_dup 2))]
 {
-  operands[2] = gen_lowpart (IFmode, operands[1]);
-}
-  [(set_attr "num_insns" "2")
-   (set_attr "length" "8")])
+  operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
 
 \f
 ;; Reload helper functions used by rs6000_secondary_reload.  The patterns all
@@ -14940,6 +14983,40 @@
   [(set_attr "type" "vecfloat")
    (set_attr "size" "128")])
 
+;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
+;; point is a simple copy.
+(define_insn_and_split "extendkftf2"
+  [(set (match_operand:TF 0 "vsx_register_operand" "=wa,?wa")
+	(float_extend:TF (match_operand:KF 1 "vsx_register_operand" "0,wa")))]
+  "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+  "@
+   #
+   xxlor %x0,%x1,%x1"
+  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
+  [(const_int 0)]
+{
+  emit_note (NOTE_INSN_DELETED);
+  DONE;
+}
+  [(set_attr "type" "*,veclogical")
+   (set_attr "length" "0,4")])
+
+(define_insn_and_split "trunctfkf2"
+  [(set (match_operand:KF 0 "vsx_register_operand" "=wa,?wa")
+	(float_extend:KF (match_operand:TF 1 "vsx_register_operand" "0,wa")))]
+  "TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD"
+  "@
+   #
+   xxlor %x0,%x1,%x1"
+  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
+  [(const_int 0)]
+{
+  emit_note (NOTE_INSN_DELETED);
+  DONE;
+}
+  [(set_attr "type" "*,veclogical")
+   (set_attr "length" "0,4")])
+
 (define_insn "trunc<mode>df2_hw"
   [(set (match_operand:DF 0 "altivec_register_operand" "=v")
 	(float_truncate:DF

[gcc(refs/users/meissner/heads/work107)] Revert patches

[Michael Meissner]

https://gcc.gnu.org/g:cdf2510d393f3dbec1cea0fa2da151791e3125ac

commit cdf2510d393f3dbec1cea0fa2da151791e3125ac
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jan 27 11:53:55 2023 -0500

    Revert patches

Diff:
---
 gcc/ChangeLog.meissner              | 71 ++-----------------------------------
 gcc/config/rs6000/rs6000-builtin.cc | 34 ++++++++++--------
 2 files changed, 22 insertions(+), 83 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6ae64a62d3b..63b9325d363 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,73 +1,8 @@
-==================== work107, patch #22 ====================
+==================== work107, patch #22 was reverted ====================
 
-Update fp conversions #2
+==================== work107, patch #22 was reverted ====================
 
-2022-01-24   Michael Meissner  <meissner@linux.ibm.com>
-
-gcc/
-
-	* config/rs6000/rs6000.md (any_fp_cvt): New code iterator.
-	(fp_cvt): New code attribute.
-	(extendkftf2): Replace with <fp_cvt>kftf2.
-	(trunctfkf2): Replace with <fp_cvt>tfkf2.
-	(extendiftf2): Replace with <fp_cvt>iftf2.
-	(trunctfif2): Replace with <fp_cvt>tfif2.
-	(<fp_cvt>kftf2): Add both float_extend and float_truncate versions to
-	convert between 128-bit floating point types with the same format..
-	(<fp_cvt>tfkf2): Likewise.
-	(<fp_cvt>iftf2): Likewise.
-	(<fp_cvt>tfif2): Likewise.
-
-==================== work107, patch #21 ====================
-
-Update float 128-bit conversions, PR target/107299.
-
-This patch is a rewrite of the patch submitted on August 18th:
-
-| https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599988.html
-
-This patch reworks the conversions between 128-bit binary floating point types.
-Previously, we would call rs6000_expand_float128_convert to do all conversions.
-Now, we only define the conversions between the same representation that turn
-into a NOP.  The appropriate extend or truncate insn is generated, and after
-register allocation, it is converted to a move.
-
-This patch also fixes two places where we want to override the external name
-for the conversion function, and the wrong optab was used.  Previously,
-rs6000_expand_float128_convert would handle the move or generate the call as
-needed.  Now, it lets the machine independent code generate the call.  But if
-we use the machine independent code to generate the call, we need to update the
-name for two optabs where a truncate would be used in terms of converting
-between the modes.  This patch updates those two optabs.
-
-This patch was previously submitted on December 14th, 2022.  This patch changes
-one built-in function from a FLOAT_TRUNCATE to a FLOAT_EXTEND, which is needed
-by the previous patch to genmodes.cc to allow allow the same precision to be
-used for various modes.
-
-2022-01-24   Michael Meissner  <meissner@linux.ibm.com>
-
-gcc/
-
-	PR target/107299
-	* config/rs6000/rs6000.cc (init_float128_ieee): Use the correct
-	float_extend or float_truncate optab based on how the machine converts
-	between IEEE 128-bit and IBM 128-bit.
-	* config/rs6000/rs6000.md (IFKF): Delete.
-	(IFKF_reg): Delete.
-	(extendiftf2): Rewrite to be a move if IFmode and TFmode are both IBM
-	128-bit.  Do not run if TFmode is IEEE 128-bit.
-	(extendifkf2): Delete.
-	(extendtfkf2): Delete.
-	(extendtfif2): Delete.
-	(trunciftf2): Delete.
-	(truncifkf2): Delete.
-	(trunckftf2): Delete.
-	(extendkftf2): Implement conversion of IEEE 128-bit types as a move.
-	(trunctfif2): Delete.
-	(trunctfkf2): Implement conversion of IEEE 128-bit types as a move.
-	(extend<mode>tf2_internal): Delete.
-	(extendtf<mode>2_internal): Delete.
+==================== work107, patch #21 was reverted ====================
 
 ==================== work107, patch #20 ====================
 
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 873ae7ce875..737a5c42bfb 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -730,21 +730,25 @@ rs6000_init_builtins (void)
 
   if (TARGET_FLOAT128_TYPE)
     {
-      /* For C we only need to register the __ieee128 name for it.  For C++, we
-	 create a distinct type which will mangle differently (u9__ieee128)
-	 vs. _Float128 (DF128_) and behave backwards compatibly.
-
-	 In the past we used the long double type if long double was IEEE
-	 128-bit.  This leads to differences if _Float128 and __float128 are
-	 not compatible types.  In particular, it showed up in generating
-	 signaling NaNs with __builtin_nansf128 and storing it into __float128,
-	 which at the time was based on long double.  Because they were
-	 different types, the signaling part of the NaN was lost in the
-	 conversion.  */
-      if (float128t_type_node == NULL_TREE)
-	float128t_type_node = build_variant_type_copy (float128_type_node);
-
-      ieee128_float_type_node = float128t_type_node;
+      if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+	ieee128_float_type_node = long_double_type_node;
+      else
+	{
+	  /* For C we only need to register the __ieee128 name for
+	     it.  For C++, we create a distinct type which will mangle
+	     differently (u9__ieee128) vs. _Float128 (DF128_) and behave
+	     backwards compatibly.  */
+	  if (float128t_type_node == NULL_TREE)
+	    {
+	      float128t_type_node = make_node (REAL_TYPE);
+	      TYPE_PRECISION (float128t_type_node)
+		= TYPE_PRECISION (float128_type_node);
+	      layout_type (float128t_type_node);
+	      SET_TYPE_MODE (float128t_type_node,
+			     TYPE_MODE (float128_type_node));
+	    }
+	  ieee128_float_type_node = float128t_type_node;
+	}
       t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
       lang_hooks.types.register_builtin_type (ieee128_float_type_node,
 					      "__ieee128");