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From: Kito Cheng <kito@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r13-5432] RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes
Date: Fri, 27 Jan 2023 09:59:30 +0000 (GMT)	[thread overview]
Message-ID: <20230127095930.38F683858C31@sourceware.org> (raw)

https://gcc.gnu.org/g:0f024ff988aeaacd8d0f967c5f841ab20fb40c19

commit r13-5432-g0f024ff988aeaacd8d0f967c5f841ab20fb40c19
Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Jan 20 17:33:09 2023 +0800

    RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes
    
    According to RVV ISA, RVV doesn't support EEW == 64 vector type for zve32x
    and zve32f. So it makes sense add predicate in the iterators of EEW = 64
    vector modes.
    
    gcc/ChangeLog:
    
            * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.

Diff:
---
 gcc/config/riscv/vector-iterators.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md
index 840cd8d598a..c1ec23452bc 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -22,7 +22,8 @@
   VNx1QI VNx2QI VNx4QI VNx8QI VNx16QI VNx32QI (VNx64QI "TARGET_MIN_VLEN > 32")
   VNx1HI VNx2HI VNx4HI VNx8HI VNx16HI (VNx32HI "TARGET_MIN_VLEN > 32")
   VNx1SI VNx2SI VNx4SI VNx8SI (VNx16SI "TARGET_MIN_VLEN > 32")
-  VNx1DI VNx2DI VNx4DI (VNx8DI "TARGET_MIN_VLEN > 32")
+  (VNx1DI "TARGET_MIN_VLEN > 32") (VNx2DI "TARGET_MIN_VLEN > 32")
+  (VNx4DI "TARGET_MIN_VLEN > 32") (VNx8DI "TARGET_MIN_VLEN > 32")
   (VNx1SF "TARGET_VECTOR_ELEN_FP_32")
   (VNx2SF "TARGET_VECTOR_ELEN_FP_32")
   (VNx4SF "TARGET_VECTOR_ELEN_FP_32")
@@ -38,7 +39,8 @@
   (VNx4QI "TARGET_MIN_VLEN == 32") VNx8QI VNx16QI VNx32QI (VNx64QI "TARGET_MIN_VLEN > 32")
   (VNx2HI "TARGET_MIN_VLEN == 32") VNx4HI VNx8HI VNx16HI (VNx32HI "TARGET_MIN_VLEN > 32")
   (VNx1SI "TARGET_MIN_VLEN == 32") VNx2SI VNx4SI VNx8SI (VNx16SI "TARGET_MIN_VLEN > 32")
-  VNx1DI VNx2DI VNx4DI (VNx8DI "TARGET_MIN_VLEN > 32")
+  (VNx1DI "TARGET_MIN_VLEN > 32") (VNx2DI "TARGET_MIN_VLEN > 32")
+  (VNx4DI "TARGET_MIN_VLEN > 32") (VNx8DI "TARGET_MIN_VLEN > 32")
   (VNx1SF "TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN == 32")
   (VNx2SF "TARGET_VECTOR_ELEN_FP_32")
   (VNx4SF "TARGET_VECTOR_ELEN_FP_32")

                 reply	other threads:[~2023-01-27  9:59 UTC|newest]

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