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* [gcc(refs/users/pheeck/heads/sccp)] Guard 64/32-bit vector move patterns with ix86_hard_reg_move_ok.
@ 2023-02-15 10:18 Filip Kastl
0 siblings, 0 replies; only message in thread
From: Filip Kastl @ 2023-02-15 10:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7a3aad419801683967a2fed286ae9ef106f2b1e4
commit 7a3aad419801683967a2fed286ae9ef106f2b1e4
Author: liuhongt <hongtao.liu@intel.com>
Date: Mon Nov 21 16:09:13 2022 +0800
Guard 64/32-bit vector move patterns with ix86_hard_reg_move_ok.
gcc/ChangeLog:
* config/i386/mmx.md (*mov<mode>_internal): Add
ix86_hard_reg_move_ok to condition.
Diff:
---
gcc/config/i386/mmx.md | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index d5134cc351e..63aff287795 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -133,7 +133,8 @@
(match_operand:MMXMODE 1 "nonimm_or_0_operand"
"rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!y,r ,C,v,m,v,v,r,*x,!y"))]
"(TARGET_MMX || TARGET_MMX_WITH_SSE)
- && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ && !(MEM_P (operands[0]) && MEM_P (operands[1]))
+ && ix86_hardreg_mov_ok (operands[0], operands[1])"
{
switch (get_attr_type (insn))
{
@@ -286,7 +287,8 @@
"=r ,m ,v,v,v,m,r,v")
(match_operand:V_32 1 "general_operand"
"rmC,rC,C,v,m,v,v,r"))]
- "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+ && ix86_hardreg_mov_ok (operands[0], operands[1])"
{
switch (get_attr_type (insn))
{
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