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* [gcc r13-6123] Daily bump.
@ 2023-02-18  0:18 GCC Administrator
  0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2023-02-18  0:18 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:7814ce44f24181a4e8e8e0d6815fe2f493b2aa33

commit r13-6123-g7814ce44f24181a4e8e8e0d6815fe2f493b2aa33
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Feb 18 00:17:20 2023 +0000

    Daily bump.

Diff:
---
 contrib/ChangeLog       |   4 +
 fixincludes/ChangeLog   |   5 ++
 gcc/ChangeLog           | 209 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |  56 +++++++++++++
 gcc/rust/ChangeLog      |   4 +
 gcc/testsuite/ChangeLog |  47 +++++++++++
 7 files changed, 326 insertions(+), 1 deletion(-)

diff --git a/contrib/ChangeLog b/contrib/ChangeLog
index 9455b795658..219a2e22e4b 100644
--- a/contrib/ChangeLog
+++ b/contrib/ChangeLog
@@ -1,3 +1,7 @@
+2023-02-17  Petr Sumbera  <petr.sumbera@oracle.com>
+
+	* make_sunver.pl: Escape brace.
+
 2023-02-10  Flavio Cruz  <flaviocruz@gmail.com>
 
 	* config-list.mk: Add x86_64-gnu to list of archs.
diff --git a/fixincludes/ChangeLog b/fixincludes/ChangeLog
index f7d559264b0..9d9b31a35d9 100644
--- a/fixincludes/ChangeLog
+++ b/fixincludes/ChangeLog
@@ -1,3 +1,8 @@
+2023-02-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* inclhack.def (solaris_math_12): Add bypass.
+	* fixincl.x: Regenerate.
+
 2023-01-21  Iain Sandoe  <iain@sandoe.co.uk>
 
 	* fixincl.x: Regenerate.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b8fbe647a76..b98a3948374 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,212 @@
+2023-02-17  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	* doc/invoke.texi (@item -Wall): Fix typo in
+	-Wuse-after-free.
+
+2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
+
+	PR target/108831
+	* config/i386/predicates.md
+	(nonimm_x64constmem_operand): New predicate.
+	* config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
+	(*subqi_ext<mode>_0): Ditto.
+	(*andqi_ext<mode>_0): Ditto.
+	(*<any_or:code>qi_ext<mode>_0): Ditto.
+
+2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
+
+	PR target/108805
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Use
+	int_outermode instead of GET_MODE (tem) to prevent
+	VOIDmode from entering simplify_gen_subreg.
+
+2023-02-17  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/108821
+	* tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
+	move volatile accesses.
+
+2023-02-17  Richard Biener  <rguenther@suse.de>
+
+	* tree-ssa.cc (ssa_undefined_value_p): Assert we are not
+	called on virtual operands.
+	* tree-ssa-sccvn.cc (vn_phi_lookup): Guard
+	ssa_undefined_value_p calls.
+	(vn_phi_insert): Likewise.
+	(set_ssa_val_to): Likewise.
+	(visit_phi): Avoid extra work with equivalences for
+	virtual operand PHIs.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
+	class.
+	(class mask_nlogic): Ditto.
+	(class mask_notlogic): Ditto.
+	(class vmmv): Ditto.
+	(class vmclr): Ditto.
+	(class vmset): Ditto.
+	(class vmnot): Ditto.
+	(class vcpop): Ditto.
+	(class vfirst): Ditto.
+	(class mask_misc): Ditto.
+	(class viota): Ditto.
+	(class vid): Ditto.
+	(BASE): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
+	* config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
+	(vmnand): Ditto.
+	(vmandn): Ditto.
+	(vmxor): Ditto.
+	(vmor): Ditto.
+	(vmnor): Ditto.
+	(vmorn): Ditto.
+	(vmxnor): Ditto.
+	(vmmv): Ditto.
+	(vmclr): Ditto.
+	(vmset): Ditto.
+	(vmnot): Ditto.
+	(vcpop): Ditto.
+	(vfirst): Ditto.
+	(vmsbf): Ditto.
+	(vmsif): Ditto.
+	(vmsof): Ditto.
+	(viota): Ditto.
+	(vid): Ditto.
+	* config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
+	(struct mask_alu_def): Ditto.
+	(SHAPE): Ditto.
+	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
+	* config/riscv/riscv-vector-builtins.cc: Ditto.
+	* config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
+	for dest it scalar RVV intrinsics.
+	* config/riscv/vector-iterators.md (sof): New iterator.
+	* config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
+	(@pred_<optab>not<mode>): New pattern.
+	(@pred_popcount<VB:mode><P:mode>): New pattern.
+	(@pred_ffs<VB:mode><P:mode>): New pattern.
+	(@pred_<misc_op><mode>): New pattern.
+	(@pred_iota<mode>): New pattern.
+	(@pred_series<mode>): New pattern.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
+	(vsbc): Ditto.
+	(vmerge): Ditto.
+	(vmv_v): Ditto.
+	* config/riscv/riscv-vector-builtins.cc: Ditto.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+	    kito-cheng  <kito.cheng@sifive.com>
+
+	* config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
+	* config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
+	(sew64_scalar_helper): New function.
+	* config/riscv/vector.md: Normalization.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
+	(vsm): Ditto.
+	(vsse): Ditto.
+	(vsoxei64): Ditto.
+	(vsub): Ditto.
+	(vand): Ditto.
+	(vor): Ditto.
+	(vxor): Ditto.
+	(vsll): Ditto.
+	(vsra): Ditto.
+	(vsrl): Ditto.
+	(vmin): Ditto.
+	(vmax): Ditto.
+	(vminu): Ditto.
+	(vmaxu): Ditto.
+	(vmul): Ditto.
+	(vmulh): Ditto.
+	(vmulhu): Ditto.
+	(vmulhsu): Ditto.
+	(vdiv): Ditto.
+	(vrem): Ditto.
+	(vdivu): Ditto.
+	(vremu): Ditto.
+	(vnot): Ditto.
+	(vsext): Ditto.
+	(vzext): Ditto.
+	(vwadd): Ditto.
+	(vwsub): Ditto.
+	(vwmul): Ditto.
+	(vwmulu): Ditto.
+	(vwmulsu): Ditto.
+	(vwaddu): Ditto.
+	(vwsubu): Ditto.
+	(vsbc): Ditto.
+	(vmsbc): Ditto.
+	(vnsra): Ditto.
+	(vmerge): Ditto.
+	(vmv_v): Ditto.
+	(vmsne): Ditto.
+	(vmslt): Ditto.
+	(vmsgt): Ditto.
+	(vmsle): Ditto.
+	(vmsge): Ditto.
+	(vmsltu): Ditto.
+	(vmsgtu): Ditto.
+	(vmsleu): Ditto.
+	(vmsgeu): Ditto.
+	(vnmsac): Ditto.
+	(vmadd): Ditto.
+	(vnmsub): Ditto.
+	(vwmacc): Ditto.
+	(vsadd): Ditto.
+	(vssub): Ditto.
+	(vssubu): Ditto.
+	(vaadd): Ditto.
+	(vasub): Ditto.
+	(vasubu): Ditto.
+	(vsmul): Ditto.
+	(vssra): Ditto.
+	(vssrl): Ditto.
+	(vnclip): Ditto.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
+	(@pred_<optab><mode>_scalar): Ditto.
+	(*pred_<optab><mode>_scalar): Ditto.
+	(*pred_<optab><mode>_extended_scalar): Ditto.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
+	(init_builtins): Ditto.
+	(mangle_builtin_type): Ditto.
+	(verify_type_context): Ditto.
+	(handle_pragma_vector):  Ditto.
+	(builtin_decl): Ditto.
+	(expand_builtin): Ditto.
+	(const_vec_all_same_in_range_p): Ditto.
+	(legitimize_move): Ditto.
+	(emit_vlmax_op): Ditto.
+	(emit_nonvlmax_op): Ditto.
+	(get_vlmul): Ditto.
+	(get_ratio): Ditto.
+	(get_ta): Ditto.
+	(get_ma): Ditto.
+	(get_avl_type): Ditto.
+	(calculate_ratio): Ditto.
+	(enum vlmul_type): Ditto.
+	(simm5_p): Ditto.
+	(neg_simm5_p): Ditto.
+	(has_vi_variant_p): Ditto.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-protos.h (simm32_p): Remove.
+	* config/riscv/riscv-v.cc (simm32_p): Ditto.
+	* config/riscv/vector.md: Use immediate_operand
+	instead of riscv_vector::simm32_p.
+
 2023-02-16  Gerald Pfeifer  <gerald@pfeifer.com>
 
 	* doc/invoke.texi (Optimize Options): Reword the explanation
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index ef309477de2..ac1301f036f 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230217
+20230218
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 148276bff27..33fc32f29ca 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,59 @@
+2023-02-17  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/108243
+	PR c++/97553
+	* cp-gimplify.cc (enum fold_flags): Define.
+	(fold_flags_t): Declare.
+	(cp_fold_data::genericize): Replace this data member with ...
+	(cp_fold_data::fold_flags): ... this.
+	(cp_fold_r): Adjust use of cp_fold_data and calls to cp_fold.
+	(cp_fold_function): Likewise.
+	(cp_fold_maybe_rvalue): Add an internal overload that
+	additionally takes and propagates a fold_flags_t parameter, and
+	define the existing public overload in terms of it.
+	(cp_fold_rvalue): Likewise.
+	(cp_fully_fold_init): Adjust use of cp_fold_data.
+	(fold_cache): Replace with ...
+	(fold_caches): ... this 2-element array of caches.
+	(get_fold_cache): Define.
+	(clear_fold_cache): Adjust.
+	(cp_fold): Add fold_flags_t parameter.  Use get_fold_cache.
+	Pass flags to calls to cp_fold, cp_fold_rvalue and
+	cp_fold_maybe_rvalue.
+	<case CALL_EXPR>: If ff_mce_false is set, fold
+	__builtin_is_constant_evaluated to false and pass mce_false to
+	maybe_constant_value.
+
+2023-02-17  Patrick Palka  <ppalka@redhat.com>
+
+	* constexpr.cc (constexpr_call::manifestly_const_eval): Give
+	it type int instead of bool.
+	(constexpr_ctx::manifestly_const_eval): Give it type mce_value
+	instead of bool.
+	(cxx_eval_builtin_function_call): Adjust after making
+	manifestly_const_eval tri-state.
+	(cxx_eval_call_expression): Likewise.
+	(cxx_eval_binary_expression): Likewise.
+	(cxx_eval_conditional_expression): Likewise.
+	(cxx_eval_constant_expression): Likewise.
+	(cxx_eval_outermost_constant_expr): Likewise.
+	(cxx_constant_value): Likewise.
+	(cxx_constant_dtor): Likewise.
+	(maybe_constant_value): Give manifestly_const_eval parameter
+	type mce_value instead of bool and adjust accordingly.
+	(fold_non_dependent_expr_template): Adjust call
+	to cxx_eval_outermost_constant_expr.
+	(fold_non_dependent_expr): Likewise.
+	(maybe_constant_init_1): Likewise.
+	* constraint.cc (satisfy_atom): Adjust call to
+	maybe_constant_value.
+	* cp-tree.h (enum class mce_value): Define.
+	(maybe_constant_value): Adjust manifestly_const_eval parameter
+	type and default argument.
+	* decl.cc (compute_array_index_type_loc): Adjust call to
+	maybe_constant_value.
+	* pt.cc (convert_nontype_argument): Likewise.
+
 2023-02-16  Patrick Palka  <ppalka@redhat.com>
 
 	PR c++/107773
diff --git a/gcc/rust/ChangeLog b/gcc/rust/ChangeLog
index 033b0ff7c0b..6c6d7f9d8c9 100644
--- a/gcc/rust/ChangeLog
+++ b/gcc/rust/ChangeLog
@@ -1,3 +1,7 @@
+2023-02-17  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* backend/rust-tree.cc: '#include "tm_p.h"'.
+
 2023-01-31  Philip Herron  <philip.herron@embecosm.com>
 
 	* Make-lang.in: Remove `rust-hir-typecheck-toplevel` object and add
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 63968c79cd3..1f8e7247218 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,50 @@
+2023-02-17  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/108243
+	PR c++/97553
+	* g++.dg/opt/is_constant_evaluated1.C: New test.
+	* g++.dg/opt/is_constant_evaluated2.C: New test.
+
+2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
+
+	PR target/108831
+	* gcc.target/i386/pr108831-1.c: New test.
+	* gcc.target/i386/pr108831-2.c: Ditto.
+
+2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
+
+	PR target/108805
+	* gcc.dg/pr108805.c: New test.
+
+2023-02-17  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/108821
+	* gcc.dg/tree-ssa/ssa-lim-24.c: New testcase.
+
+2023-02-17  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	* gfortran.dg/ISO_Fortran_binding_14.f90: Change example function to
+	CLOCK which is available on mingw as well as other platforms.
+	* gfortran.dg/pr96486.f90: Change variable to PATH likewise.
+
+2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-148.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-149.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-150.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-151.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-152.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-153.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-156.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-157.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-159.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-160.c: Change vmnot.mm to vmnot.m.
+	* gcc.target/riscv/rvv/base/binop_vx_constraint-161.c: Change vmnot.mm to vmnot.m.
+
+2023-02-17  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	* gfortran.dg/bind_c_array_params_2.f90: Add *-*-ming* to dg-final.
+
 2023-02-16  David Malcolm  <dmalcolm@redhat.com>
 
 	PR analyzer/108806

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