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* [gcc(refs/users/aoliva/heads/testme)] [arm] avoid aes-1742098 mitigation in combine tests
@ 2023-02-23 13:48 Alexandre Oliva
0 siblings, 0 replies; 3+ messages in thread
From: Alexandre Oliva @ 2023-02-23 13:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a82bf99b47879aa7eb38d5247e091128a40c8359
commit a82bf99b47879aa7eb38d5247e091128a40c8359
Author: Alexandre Oliva <oliva@adacore.com>
Date: Thu Feb 23 10:30:32 2023 -0300
[arm] avoid aes-1742098 mitigation in combine tests
The expected asm output for aes-fuse-[12].c does not correspond to
that which is generated when -mfix-cortex-a57-aes-1742098 is enabled.
The mitigation was introduced after the test, and enabled by default
for the selected processor, a72. Select a53 instead, where the
migitation is not enabled by default, and all the expected fusions can
take place.
for gcc/testsuite/ChangeLog
* gcc.target/arm/aes-fuse-1.c: Switch to -mcpu=cortex-a53.
* gcc.target/arm/aes-fuse-2.c: Likewise.
Diff:
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/aoliva/heads/testme)] [arm] avoid aes-1742098 mitigation in combine tests
@ 2023-02-22 17:23 Alexandre Oliva
0 siblings, 0 replies; 3+ messages in thread
From: Alexandre Oliva @ 2023-02-22 17:23 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0d9ca6d73b551166be95c70fcc2b153f4f1d5efb
commit 0d9ca6d73b551166be95c70fcc2b153f4f1d5efb
Author: Alexandre Oliva <oliva@adacore.com>
Date: Thu Feb 16 06:52:25 2023 -0300
[arm] avoid aes-1742098 mitigation in combine tests
The expected asm output for aes-fuse-[12].c does not correspond to
that which is generated when -mfix-cortex-a57-aes-1742098 is enabled.
The mitigation was introduced after the test, and enabled by default
for the selected processor, a72. Select a53 instead, where the
migitation is not enabled by default, and all the expected fusions can
take place.
for gcc/testsuite/ChangeLog
* gcc.target/arm/aes-fuse-1.c: Switch to -mcpu=cortex-a53.
* gcc.target/arm/aes-fuse-2.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/arm/aes-fuse-1.c | 2 +-
gcc/testsuite/gcc.target/arm/aes-fuse-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/aes-fuse-1.c b/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
index 27b08aeef7b..a1bbe054e0a 100644
--- a/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
+++ b/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_crypto_ok } */
/* { dg-add-options arm_crypto } */
-/* { dg-additional-options "-mcpu=cortex-a72 -O3 -dp" } */
+/* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
#include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/arm/aes-fuse-2.c b/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
index 1266a287531..ede3237ce26 100644
--- a/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
+++ b/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_crypto_ok } */
/* { dg-add-options arm_crypto } */
-/* { dg-additional-options "-mcpu=cortex-a72 -O3 -dp" } */
+/* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
#include <arm_neon.h>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/aoliva/heads/testme)] [arm] avoid aes-1742098 mitigation in combine tests
@ 2023-02-22 14:49 Alexandre Oliva
0 siblings, 0 replies; 3+ messages in thread
From: Alexandre Oliva @ 2023-02-22 14:49 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8ed45ba9fc761713acaff114efd881eda7c17c06
commit 8ed45ba9fc761713acaff114efd881eda7c17c06
Author: Alexandre Oliva <oliva@adacore.com>
Date: Thu Feb 16 06:52:25 2023 -0300
[arm] avoid aes-1742098 mitigation in combine tests
The expected asm output for aes-fuse-[12].c does not correspond to
that which is generated when -mfix-cortex-a57-aes-1742098 is enabled.
The mitigation was introduced after the test, and enabled by default
for the selected processor, a72. Select a53 instead, where the
migitation is not enabled by default, and all the expected fusions can
take place.
for gcc/testsuite/ChangeLog
* gcc.target/arm/aes-fuse-1.c: Switch to -mcpu=cortex-a53.
* gcc.target/arm/aes-fuse-2.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/arm/aes-fuse-1.c | 2 +-
gcc/testsuite/gcc.target/arm/aes-fuse-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/aes-fuse-1.c b/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
index 27b08aeef7b..a1bbe054e0a 100644
--- a/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
+++ b/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_crypto_ok } */
/* { dg-add-options arm_crypto } */
-/* { dg-additional-options "-mcpu=cortex-a72 -O3 -dp" } */
+/* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
#include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/arm/aes-fuse-2.c b/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
index 1266a287531..ede3237ce26 100644
--- a/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
+++ b/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_crypto_ok } */
/* { dg-add-options arm_crypto } */
-/* { dg-additional-options "-mcpu=cortex-a72 -O3 -dp" } */
+/* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
#include <arm_neon.h>
^ permalink raw reply [flat|nested] 3+ messages in thread
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