[gcc(refs/users/meissner/heads/work109)] Revert patches

[gcc(refs/users/meissner/heads/work109)] Revert patches

[Michael Meissner]

https://gcc.gnu.org/g:5771f4b55d1cfa8be1b3c275cef2f1d4e4613f3c

commit 5771f4b55d1cfa8be1b3c275cef2f1d4e4613f3c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Mar 3 16:18:44 2023 -0500

    Revert patches

Diff:
---
 gcc/config/rs6000/vsx.md                   | 18 ------------------
 gcc/testsuite/gcc.target/powerpc/pr99293.c | 22 ----------------------
 2 files changed, 40 deletions(-)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 29913168dd2..0865608f94a 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4573,24 +4573,6 @@
   "lxvdsx %x0,%y1"
   [(set_attr "type" "vecload")])
 
-;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
-(define_insn "*vsx_splat_extract_<mode>"
-  [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
-	(vec_duplicate:VSX_D
-	 (vec_select:<VEC_base>
-	  (match_operand:VSX_D 1 "vsx_register_operand" "wa")
-	  (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
-  "VECTOR_MEM_VSX_P (<MODE>mode)"
-{
-  int which_word = INTVAL (operands[2]);
-  if (!BYTES_BIG_ENDIAN)
-    which_word = 1 - which_word;
-
-  operands[3] = GEN_INT (which_word ? 3 : 0);
-  return "xxpermdi %x0,%x1,%x1,%3";
-}
-  [(set_attr "type" "vecperm")])
-
 ;; V4SI splat support
 (define_insn "vsx_splat_v4si"
   [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c b/gcc/testsuite/gcc.target/powerpc/pr99293.c
deleted file mode 100644
index 20adc1f27f6..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr99293.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile { target powerpc*-*-* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx" } */
-
-/* Test for PR 99263, which wants to do:
-	__builtin_vec_splats (__builtin_vec_extract (v, n))
-
-   where v is a V2DF or V2DI vector and n is either 0 or 1.  Previously the
-   compiler would do a direct move to the GPR registers to select the item and a
-   direct move from the GPR registers to do the splat.  */
-
-vector long long splat_dup_l_0 (vector long long v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 0));
-}
-
-vector long long splat_dup_l_1 (vector long long v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 1));
-}
-
-/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */

[gcc(refs/users/meissner/heads/work109)] Revert patches

[Michael Meissner]

https://gcc.gnu.org/g:4e47c9b560c25546a85ad013d1584a8346074c67

commit 4e47c9b560c25546a85ad013d1584a8346074c67
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Mar 2 18:07:22 2023 -0500

    Revert patches

Diff:
---
 gcc/config/rs6000/rs6000.md | 52 ---------------------------------------------
 1 file changed, 52 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4bc0b957ac1..81bffb04ceb 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -986,58 +986,6 @@
    (set_attr "dot" "yes")
    (set_attr "length" "4,8")])
 
-(define_insn_and_split "zero_extendditi2"
-  [(set (match_operand:TI 0 "gpc_reg_operand" "=r,r,wa,wa,wa")
-	(zero_extend:TI
-	 (match_operand:DI 1 "reg_or_mem_operand" "r,m,b,Z,wa")))
-   (clobber (match_scratch:DI 2 "=&X,X,X,X,wa"))]
-  "TARGET_POWERPC64 && TARGET_P9_VECTOR"
-  "@
-   #
-   #
-   mtvsrdd %x0,0,%1
-   lxvrdx %x0,%y1
-   #"
-  "&& reload_completed
-   && (int_reg_operand (operands[0], TImode)
-       || (vsx_register_operand (operands[0], TImode)
-	   && vsx_register_operand (operands[1], DImode)))"
-  [(set (match_dup 2) (match_dup 1))
-   (set (match_dup 3) (const_int 0))]
-{
-  rtx dest = operands[0];
-  rtx src = operands[1];
-
-  /* If we are converting a VSX DImode to VSX TImode, we need to move the upper
-     64-bits (DImode) to the lower 64-bits.  We can't just do a xxpermdi
-     instruction to swap the two 64-bit words, because can't rely on the bottom
-     64-bits of the VSX register being 0.  Instead we create a 0 and do the
-     xxpermdi operation to combine the two registers.  */
-  if (vsx_register_operand (dest, TImode)
-      && vsx_register_operand (src, DImode))
-    {
-      rtx tmp = operands[2];
-      emit_move_insn (tmp, const0_rtx);
-
-      rtx hi = tmp;
-      rtx lo = src;
-      if (!BYTES_BIG_ENDIAN)
-	std::swap (hi, lo);
-
-      rtx dest_v2di = gen_rtx_REG (V2DImode, reg_or_subregno (dest));
-      emit_insn (gen_vsx_concat_v2di (dest_v2di, hi, lo));
-      DONE;
-    }
-
-  /* If we are zero extending to a GPR register either from a GPR register,
-     a VSX register or from memory, do the zero extend operation to the
-     lower DI register, and set the upper DI register to 0.  */
-  operands[2] = gen_lowpart (DImode, dest);
-  operands[3] = gen_highpart (DImode, dest);
-}
-  [(set_attr "type" "*,load,vecexts,vecload,vecperm")
-   (set_attr "isa" "*,*,p9v,p10,*")
-   (set_attr "length" "8,8,*,*,8")])
 
 (define_insn "extendqi<mode>2"
   [(set (match_operand:EXTQI 0 "gpc_reg_operand" "=r,?*v")