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* [gcc(refs/users/meissner/heads/work109)] Fix splat of extract for long long and double.
@ 2023-03-03 21:20 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2023-03-03 21:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a6334aea2204ccec0d19d1738f9e2f12ecf2bab0
commit a6334aea2204ccec0d19d1738f9e2f12ecf2bab0
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 3 16:19:54 2023 -0500
Fix splat of extract for long long and double.
2023-03-03 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/99293
* gcc/config/vsx.md (vsx_splat_extract_<mode>): New combiner insn.
gcc/testsuite/
PR target/108958
* gcc.target/powerpc/pr99293.c: New test.
Diff:
---
gcc/config/rs6000/vsx.md | 18 ++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr99293.c | 21 +++++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 0865608f94a..29913168dd2 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4573,6 +4573,24 @@
"lxvdsx %x0,%y1"
[(set_attr "type" "vecload")])
+;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
+(define_insn "*vsx_splat_extract_<mode>"
+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
+ (vec_duplicate:VSX_D
+ (vec_select:<VEC_base>
+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")
+ (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
+ "VECTOR_MEM_VSX_P (<MODE>mode)"
+{
+ int which_word = INTVAL (operands[2]);
+ if (!BYTES_BIG_ENDIAN)
+ which_word = 1 - which_word;
+
+ operands[3] = GEN_INT (which_word ? 3 : 0);
+ return "xxpermdi %x0,%x1,%x1,%3";
+}
+ [(set_attr "type" "vecperm")])
+
;; V4SI splat support
(define_insn "vsx_splat_v4si"
[(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c b/gcc/testsuite/gcc.target/powerpc/pr99293.c
new file mode 100644
index 00000000000..582bebb88ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr99293.c
@@ -0,0 +1,21 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* Test for PR 99263, which wants to do:
+ __builtin_vec_splats (__builtin_vec_extract (v, n))
+
+ where v is a V2DF or V2DI vector and n is either 0 or 1. Previously the
+ compiler would do a direct move to the GPR registers to select the item and a
+ direct move from the GPR registers to do the splat. */
+
+vector long long splat_dup_l_0 (vector long long v)
+{
+ return __builtin_vec_splats (__builtin_vec_extract (v, 0));
+}
+
+vector long long splat_dup_l_1 (vector long long v)
+{
+ return __builtin_vec_splats (__builtin_vec_extract (v, 1));
+}
+
+/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/users/meissner/heads/work109)] Fix splat of extract for long long and double.
@ 2023-03-03 21:16 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2023-03-03 21:16 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5d5f0652090accfca7f69b4f3a11c92d5a5ee8c5
commit 5d5f0652090accfca7f69b4f3a11c92d5a5ee8c5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 3 16:16:06 2023 -0500
Fix splat of extract for long long and double.
2023-03-03 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/99293
* gcc/config/vsx.md (vsx_splat_extract_<mode>): New combiner insn.
gcc/testsuite/
PR target/108958
* gcc.target/powerpc/pr99293.c: New test.
Diff:
---
gcc/config/rs6000/vsx.md | 18 ++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr99293.c | 22 ++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 0865608f94a..29913168dd2 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4573,6 +4573,24 @@
"lxvdsx %x0,%y1"
[(set_attr "type" "vecload")])
+;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
+(define_insn "*vsx_splat_extract_<mode>"
+ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
+ (vec_duplicate:VSX_D
+ (vec_select:<VEC_base>
+ (match_operand:VSX_D 1 "vsx_register_operand" "wa")
+ (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
+ "VECTOR_MEM_VSX_P (<MODE>mode)"
+{
+ int which_word = INTVAL (operands[2]);
+ if (!BYTES_BIG_ENDIAN)
+ which_word = 1 - which_word;
+
+ operands[3] = GEN_INT (which_word ? 3 : 0);
+ return "xxpermdi %x0,%x1,%x1,%3";
+}
+ [(set_attr "type" "vecperm")])
+
;; V4SI splat support
(define_insn "vsx_splat_v4si"
[(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c b/gcc/testsuite/gcc.target/powerpc/pr99293.c
new file mode 100644
index 00000000000..20adc1f27f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr99293.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+/* Test for PR 99263, which wants to do:
+ __builtin_vec_splats (__builtin_vec_extract (v, n))
+
+ where v is a V2DF or V2DI vector and n is either 0 or 1. Previously the
+ compiler would do a direct move to the GPR registers to select the item and a
+ direct move from the GPR registers to do the splat. */
+
+vector long long splat_dup_l_0 (vector long long v)
+{
+ return __builtin_vec_splats (__builtin_vec_extract (v, 0));
+}
+
+vector long long splat_dup_l_1 (vector long long v)
+{
+ return __builtin_vec_splats (__builtin_vec_extract (v, 1));
+}
+
+/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
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