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* [gcc r13-6538] Fix MIPS testsuite over-eager matching
@ 2023-03-08  5:02 Jeff Law
  0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-03-08  5:02 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:0d25f8265b3ba9338f4572ac3fab08e3f33367a5

commit r13-6538-g0d25f8265b3ba9338f4572ac3fab08e3f33367a5
Author: Jeff Law <jlaw@ventanamicro>
Date:   Tue Mar 7 22:00:39 2023 -0700

    Fix MIPS testsuite over-eager matching
    
    The mips msa-ds.c test is trying to ensure that MSA branches can have their
    delay slots filled.  The regexp it used looked for the function name, a nop,
    then the function name again.  If found that sequence, then the test failed.
    
    The problem is with Vlad's recent IRA work there's simply less code in the
    test (good) and as a result one of the *other* branches in the test had an
    unfilled delay slot -- the delay slot for the MSA branch was still being
    filled.
    
    This patch tightens up the regexp.  In particular it looks for the MSA branch
    and a nop on the next line (avoiding the over-eager .* construct).  That
    indicates that the MSA branch did not have its delay slot filled.  When that
    sequence is found, then the test fails.
    
    This fixes the recent regressions for mips64 and mips64el in the tester.
    
    Installing on the trunk,
    
    gcc/testsuite:
            * gcc.target/mips/msa-ds.c: Fix over eager pattern matching.

Diff:
---
 gcc/testsuite/gcc.target/mips/msa-ds.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/mips/msa-ds.c b/gcc/testsuite/gcc.target/mips/msa-ds.c
index c6932b280cb..37957a02bd8 100644
--- a/gcc/testsuite/gcc.target/mips/msa-ds.c
+++ b/gcc/testsuite/gcc.target/mips/msa-ds.c
@@ -27,5 +27,9 @@ int __attribute__ ((cold)) bar (v4si v , int a, int b)
    return b + c;
 }
 
-/* { dg-final { scan-assembler-not "foo:.*nop.*jr.*foo," } } */
-/* { dg-final { scan-assembler-not "bar:.*nop.*jr.*bar," } } */
+/* We need to avoid over matching here as we could have other
+   branches with unfilled slots.  So we verify that we do not have
+   an MSA branch with a NOP in its delay slot.  We need to match
+   both forms of the MSA branch that can occur in this test.  */
+/* { dg-final { scan-assembler-not "foo:.*bn\?z.w\[^\\n\\r\]*\\n\\tnop" } } */
+/* { dg-final { scan-assembler-not "bar:.*bn\?z.w\[^\\n\\r\]*\\n\\tnop" } } */

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