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* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-16 2:55 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-16 2:55 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:604274d74ae907d47ea882581cd05534e4fd2809
commit 604274d74ae907d47ea882581cd05534e4fd2809
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 15 22:55:33 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 71d546083d2..3dfe84dcc2c 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,5 +1,28 @@
==================== Branch work111, patch #21 ====================
+Make load/cmp fusion know about prefixed loads.
+
+2023-03-15 Michael Meissner <meissner@linux.ibm.com>
+ Aaron Sawdey <acsawdey@linux.ibm.com>
+
+gcc/
+
+ PR target/105325
+ * gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): The ld and lwa
+ instructions use the DS encoding instead of D. Set the sign_extend
+ attribute as appropriate.
+ * gcc/config/rs6000/fusion.md: Regenerate.
+ * gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi
+ instructions to the list of instructions that might have a prefixed load
+ instruction.
+
+gcc/testsuite/
+
+ PR target/105325
+ * g++.target/powerpc/pr105325.C: New test.
+
+==================== Branch work111, patch #21 ====================
+
Fix splat of extract for long long and double.
2023-03-15 Michael Meissner <meissner@linux.ibm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-17 18:09 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-17 18:09 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f7da986151cfd3ceff7ff8ca9cebbe4a94daa558
commit f7da986151cfd3ceff7ff8ca9cebbe4a94daa558
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 17 14:09:36 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index ca61de66604..518d2a4460e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,28 @@
+==================== Branch work111, patch #22 ====================
+
+Make load/cmp fusion know about prefixed loads.
+
+2023-03-16 Michael Meissner <meissner@linux.ibm.com>
+ Aaron Sawdey <acsawdey@linux.ibm.com>
+
+gcc/
+
+ PR target/105325
+ * gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Improve generation
+ of the ld and lwa instructions which use the DS encoding instead of D.
+ Use the YZ constraint for these loads. Handle prefixed loads better.
+ Set the sign_extend attribute as appropriate.
+ * gcc/config/rs6000/fusion.md: Regenerate.
+ * gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi
+ instructions to the list of instructions that might have a prefixed load
+ instruction.
+
+gcc/testsuite/
+
+ PR target/105325
+ * g++.target/powerpc/pr105325.C: New test.
+ * gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust insn counts.
+
==================== Branch work111, patch #21 ====================
Make load/cmp fusion know about prefixed loads.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-16 19:38 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-16 19:38 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d36570b3f31669132ce50fc0f4920d4a5fef30df
commit d36570b3f31669132ce50fc0f4920d4a5fef30df
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Mar 16 15:38:39 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3dfe84dcc2c..ca61de66604 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -2,7 +2,7 @@
Make load/cmp fusion know about prefixed loads.
-2023-03-15 Michael Meissner <meissner@linux.ibm.com>
+2023-03-16 Michael Meissner <meissner@linux.ibm.com>
Aaron Sawdey <acsawdey@linux.ibm.com>
gcc/
@@ -20,6 +20,7 @@ gcc/testsuite/
PR target/105325
* g++.target/powerpc/pr105325.C: New test.
+ * gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust insn counts.
==================== Branch work111, patch #21 ====================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-15 23:06 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-15 23:06 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:da49950d6a2f9977c0f0a08245d7340510a96a73
commit da49950d6a2f9977c0f0a08245d7340510a96a73
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 15 19:06:22 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 86e5fb40b60..71d546083d2 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,35 @@
+==================== Branch work111, patch #21 ====================
+
+Fix splat of extract for long long and double.
+
+2023-03-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ PR target/99293
+ * gcc/config/vsx.md (vsx_splat_extract_<mode>): New combiner insn.
+
+gcc/testsuite/
+
+ PR target/108958
+ * gcc.target/powerpc/pr99293.c: New test.
+
+==================== Branch work111, patch #20 ====================
+
+Improve 64->128 bit zero extension on PowerPC
+
+2023-03-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ PR target/108958
+ * gcc/config/rs6000.md (zero_extendditi2): New insn.
+
+gcc/testsuite/
+
+ PR target/108958
+ * gcc.target/powerpc/zero-extend-di-ti.c: New test.
+
==================== Branch work111, patch #1 ====================
Rework 128-bit complex multiply and divide.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-15 19:23 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-15 19:23 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7370f6d6d87a211e4690dde04533c5e9add9b41b
commit 7370f6d6d87a211e4690dde04533c5e9add9b41b
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 15 15:22:43 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 8053e116b60..86e5fb40b60 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,38 @@
+==================== Branch work111, patch #1 ====================
+
+Rework 128-bit complex multiply and divide.
+
+This patch reworks how the complex multiply and divide built-in functions are
+done. Previously GCC created built-in declarations for doing long double complex
+multiply and divide when long double is IEEE 128-bit. However, it did not
+support __ibm128 complex multiply and divide if long double is IEEE 128-bit.
+
+This code does not create the built-in declaration with the changed name.
+Instead, it uses the TARGET_MANGLE_DECL_ASSEMBLER_NAME hook to change the name
+before it is written out to the assembler file like it now does for all of the
+other long double built-in functions.
+
+2023-03-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ PR target/109067
+ * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
+ (init_float128_ieee): Delete code to switch complex multiply and divide
+ for long double.
+ (complex_multiply_builtin_code): New helper function.
+ (complex_divide_builtin_code): Likewise.
+ (rs6000_mangle_decl_assembler_name): Add support for mangling the name
+ of complex 128-bit multiply and divide built-in functions.
+
+gcc/testsuite/
+
+ PR target/109067
+ * gcc.target/powerpc/divic3-1.c: New test.
+ * gcc.target/powerpc/divic3-2.c: Likewise.
+ * gcc.target/powerpc/mulic3-1.c: Likewise.
+ * gcc.target/powerpc/mulic3-2.c: Likewise.
+
==================== Branch work111, baseline ====================
2023-03-15 Michael Meissner <meissner@linux.ibm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work111)] Update ChangeLog.meissner
@ 2023-03-15 19:18 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-03-15 19:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:77e813e499595db03bb3655c65a60b5e0968c3f4
commit 77e813e499595db03bb3655c65a60b5e0968c3f4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 15 15:18:11 2023 -0400
Update ChangeLog.meissner
Diff:
---
gcc/ChangeLog.meissner | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 7ad32b17ff4..8053e116b60 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,5 @@
+==================== Branch work111, baseline ====================
+
2023-03-15 Michael Meissner <meissner@linux.ibm.com>
Clone branch
^ permalink raw reply [flat|nested] 6+ messages in thread
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