[gcc(refs/users/meissner/heads/work114-dmr)] Update ChangeLog.meissner

[gcc(refs/users/meissner/heads/work114-dmr)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:b38871d225838da6f6c0bc2ded6e20bd0b47a058

commit b38871d225838da6f6c0bc2ded6e20bd0b47a058
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Mar 23 15:08:32 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 8fd9f260825..65bb8a6a00a 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,5 @@
+==================== Branch work114-dmr, merged up to master 3/23/2023 ====================
+
 ==================== Branch work114-dmr, baseline ====================
 
 2023-03-22   Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work114-dmr)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:3c7f277cad4ff0168b52f925f14a91b316aa3b43

commit 3c7f277cad4ff0168b52f925f14a91b316aa3b43
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Mar 23 15:40:12 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 65bb8a6a00a..632a49b86bc 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,42 @@
+==================== Branch work114-dmr, patch #1 ====================
+
+Make load/cmp fusion know about prefixed loads.
+
+The issue with the bug is the power10 load GPR + cmpi -1/0/1 fusion
+optimization generates illegal assembler code.
+
+Ultimately the code was dying because the fusion load + compare -1/0/1 patterns
+did not handle the possibility that the load might be prefixed.
+
+The main cause is the prefixed attribute did not consider that fused_load_cmpi
+insns are essentially load instructions, and to check whether the load is
+prefixed.
+
+This code ensures that the prefixed attribute is correctly set for the fusion
+load plus compare immediate insns combined instruction.  This means it will
+split the insn before final is called, and the load instruction will use a
+prefixed load.
+
+The original patch by Aaron reworked the insns generated by genfusion.pl so
+that they had constraints that limited the load to be YZ, which are constraints
+that restrict the load to offsets that the non-prefixed LWA instruction can
+handle.  I will submit that patch as a second patch.  However, just setting the
+prefixed attribute correctly will correctly split the insns.
+
+2023-03-21   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/105325
+	* gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi
+	instructions to the list of instructions that might have a prefixed load
+	instruction.
+
+gcc/testsuite/
+
+	PR target/105325
+	* g++.target/powerpc/pr105325.C: New test.
+
 ==================== Branch work114-dmr, merged up to master 3/23/2023 ====================
 
 ==================== Branch work114-dmr, baseline ====================