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* [gcc(refs/users/meissner/heads/work116)] Revert patches
@ 2023-03-27 19:40 Michael Meissner
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From: Michael Meissner @ 2023-03-27 19:40 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:bfef6fd5d38b9b25b1651ba9894b8c8c4398c33f
commit bfef6fd5d38b9b25b1651ba9894b8c8c4398c33f
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Mar 27 15:40:32 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 17 +++++-------
gcc/config/rs6000/genfusion.pl | 32 +++++-----------------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/pr105325.C | 24 ----------------
.../gcc.target/powerpc/fusion-p10-ldcmpi.c | 4 +--
5 files changed, 17 insertions(+), 62 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index da9953d9ad9..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -190,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -205,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -248,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -291,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index fa9ab7e9704..e4db352e0ce 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -56,7 +56,7 @@ sub mode_to_ldst_char
sub gen_ld_cmpi_p10
{
my ($lmode, $ldst, $clobbermode, $result, $cmpl, $echr, $constpred,
- $ccmode, $extend, $resultmode);
+ $mempred, $ccmode, $np, $extend, $resultmode);
LMODE: foreach $lmode ('DI','SI','HI','QI') {
$ldst = mode_to_ldst_char($lmode);
$clobbermode = $lmode;
@@ -69,36 +69,23 @@ sub gen_ld_cmpi_p10
# Don't allow EXTQI because that would allow HI result which we can't do.
$result = "GPR" if $result eq "EXTQI";
CCMODE: foreach $ccmode ('CC','CCUNS') {
- my $np = "NON_PREFIXED_D";
- my $mempred = "non_update_memory_operand";
- my $constraint = "m";
+ $np = "NON_PREFIXED_D";
+ $mempred = "non_update_memory_operand";
if ( $ccmode eq 'CC' ) {
next CCMODE if $lmode eq 'QI';
- if ( $lmode eq 'HI' ) {
- $np = "NON_PREFIXED_D";
- $mempred = "non_update_memory_operand";
- $echr = "a";
- } elsif ( $lmode eq 'SI' ) {
- # ld is DS-FORM.
- $np = "NON_PREFIXED_DS";
- $mempred = "lwa_operand";
- $echr = "a";
- $constraint = "YZ";
- } elsif ( $lmode eq 'DI' ) {
- # lwa is DS-FORM.
+ if ( $lmode eq 'DI' || $lmode eq 'SI' ) {
+ # ld and lwa are both DS-FORM.
$np = "NON_PREFIXED_DS";
$mempred = "ds_form_mem_operand";
- $echr = "";
- $constraint = "YZ";
}
$cmpl = "";
+ $echr = "a";
$constpred = "const_m1_to_1_operand";
} else {
if ( $lmode eq 'DI' ) {
# ld is DS-form, but lwz is not.
$np = "NON_PREFIXED_DS";
$mempred = "ds_form_mem_operand";
- $constraint = "YZ";
}
$cmpl = "l";
$echr = "z";
@@ -121,7 +108,7 @@ sub gen_ld_cmpi_p10
print "(define_insn_and_split \"*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}\"\n";
print " [(set (match_operand:${ccmode} 2 \"cc_reg_operand\" \"=x\")\n";
- print " (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"${constraint}\")\n";
+ print " (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"m\")\n";
if ($ccmode eq 'CCUNS') { print " "; }
print " (match_operand:${lmode} 3 \"${constpred}\" \"n\")))\n";
if ($result eq 'clobber') {
@@ -150,11 +137,6 @@ sub gen_ld_cmpi_p10
print " \"\"\n";
print " [(set_attr \"type\" \"fused_load_cmpi\")\n";
print " (set_attr \"cost\" \"8\")\n";
-
- if ($extend eq "sign") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
print " (set_attr \"length\" \"8\")])\n";
print "\n";
}
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d836a8a58b3..44f7dd509cb 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index f4ab384daa7..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,24 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index ca7297375a4..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -61,7 +61,7 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */
@@ -73,6 +73,6 @@ TEST(int8_t)
/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */
/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */
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2023-03-27 19:40 [gcc(refs/users/meissner/heads/work116)] Revert patches Michael Meissner
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