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* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-13 19:35 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-13 19:35 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c270bbf998d3604381352b8f8af02f79f627492e
commit c270bbf998d3604381352b8f8af02f79f627492e
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Apr 13 15:35:13 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-13 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 00f85caed62..b46c4c8417d 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3607,7 +3607,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3616,14 +3616,39 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
operands[3], SFmode);
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-14 18:58 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-14 18:58 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5ab545509e8df4372bc95717fa0cf3cbe216902e
commit 5ab545509e8df4372bc95717fa0cf3cbe216902e
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Apr 14 14:57:54 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-14 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 00f85caed62..c1cbdbe5391 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3607,7 +3607,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3616,7 +3616,7 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
@@ -3624,6 +3624,25 @@
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-14 14:31 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-14 14:31 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b1cbe685c8e2cd5b81398bda10649b4be2c5c199
commit b1cbe685c8e2cd5b81398bda10649b4be2c5c199
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Apr 14 10:31:37 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-14 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 00f85caed62..c1cbdbe5391 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3607,7 +3607,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3616,7 +3616,7 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
@@ -3624,6 +3624,25 @@
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-14 10:50 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-14 10:50 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c013192071dfa4d60f15c7a494453b74baa19b3d
commit c013192071dfa4d60f15c7a494453b74baa19b3d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Apr 14 06:50:18 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-13 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index bbae9a1dffb..6ed6eeecf80 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3607,7 +3607,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3616,14 +3616,39 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
operands[3], SFmode);
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-14 0:03 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-14 0:03 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:18dfeb9bf2be0b8e665b6d3c51944af5c3d23652
commit 18dfeb9bf2be0b8e665b6d3c51944af5c3d23652
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Apr 13 20:01:54 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-13 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 00f85caed62..b46c4c8417d 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3607,7 +3607,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3616,14 +3616,39 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
operands[3], SFmode);
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
* [gcc(refs/users/meissner/heads/work118)] Improve vec_extract of V4SF from memory with variable element.
@ 2023-04-13 17:03 Michael Meissner
0 siblings, 0 replies; 6+ messages in thread
From: Michael Meissner @ 2023-04-13 17:03 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9c68ac9c6108eb7070b583ef35c1d1603dc6f475
commit 9c68ac9c6108eb7070b583ef35c1d1603dc6f475
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Apr 13 13:03:04 2023 -0400
Improve vec_extract of V4SF from memory with variable element.
2023-04-13 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before
register allocation.
(vsx_extract_v4sf_to_df_var_load): New insn.
Diff:
---
gcc/config/rs6000/vsx.md | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 70f4e8b8365..d4386cb5028 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3613,7 +3613,7 @@
DONE;
})
-;; Variable V4SF extract from memory
+;; V4SF extract from memory with variable element number
(define_insn_and_split "*vsx_extract_v4sf_var_load"
[(set (match_operand:SF 0 "gpc_reg_operand" "=wa,?r")
(unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q,Q")
@@ -3622,14 +3622,39 @@
(clobber (match_scratch:DI 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
"#"
- "&& reload_completed"
+ "&& 1"
[(set (match_dup 0) (match_dup 4))]
{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
operands[3], SFmode);
}
[(set_attr "type" "fpload,load")])
+;; V4SF extract from memory and convert to DFmode with variable element number
+(define_insn_and_split "*vsx_extract_v4sf_to_df_var_load"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+ (float_extend:DF
+ (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_VSX_EXTRACT)))
+ (clobber (match_scratch:DI 3 "=&b"))]
+ "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+ "#"
+ "&& 1"
+ [(set (match_dup 0)
+ (float_extend:DF (match_dup 4)))]
+{
+ if (GET_CODE (operands[3]) == SCRATCH)
+ operands[3] = gen_reg_rtx (DImode);
+
+ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+ operands[3], SFmode);
+}
+ [(set_attr "type" "fpload")])
+
;; Expand the builtin form of xxpermdi to canonical rtl.
(define_expand "vsx_xxpermdi_<mode>"
[(match_operand:VSX_L 0 "vsx_register_operand")
^ permalink raw reply [flat|nested] 6+ messages in thread
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