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* [gcc r14-48] Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns
@ 2023-04-18 18:27 Jeff Law
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From: Jeff Law @ 2023-04-18 18:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9874ceed091a0ce17b23d8d77b5bf90b8902a3c0
commit r14-48-g9874ceed091a0ce17b23d8d77b5bf90b8902a3c0
Author: Sinan Lin <sinan.lin@linux.alibaba.com>
Date: Tue Apr 18 12:24:52 2023 -0600
Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns
gcc/
* config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
(bswapdi2, bswapsi2): Similarly.
Diff:
---
gcc/config/riscv/bitmanip.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 062968d479f..388ef662820 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -297,7 +297,7 @@
[(set (match_operand:GPR 0 "register_operand")
(rotatert:GPR (match_operand:GPR 1 "register_operand")
(match_operand:QI 2 "arith_operand")))]
- "TARGET_ZBB || TARGET_XTHEADBB"
+ "TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB"
{
if (TARGET_XTHEADBB && !immediate_operand (operands[2], VOIDmode))
FAIL;
@@ -362,12 +362,12 @@
(define_expand "bswapdi2"
[(set (match_operand:DI 0 "register_operand")
(bswap:DI (match_operand:DI 1 "register_operand")))]
- "TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB)")
+ "TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB)")
(define_expand "bswapsi2"
[(set (match_operand:SI 0 "register_operand")
(bswap:SI (match_operand:SI 1 "register_operand")))]
- "(!TARGET_64BIT && TARGET_ZBB) || TARGET_XTHEADBB")
+ "(!TARGET_64BIT && (TARGET_ZBB || TARGET_ZBKB)) || TARGET_XTHEADBB")
(define_insn "*bswap<mode>2"
[(set (match_operand:X 0 "register_operand" "=r")
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2023-04-18 18:27 [gcc r14-48] Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns Jeff Law
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