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* [gcc/devel/omp/gcc-12] amdgcn: bug fix ldexp insn
@ 2023-04-21 11:23 Andrew Stubbs
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From: Andrew Stubbs @ 2023-04-21 11:23 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b150ba8eebcce5ac847b09c22ae03d7a91185d63
commit b150ba8eebcce5ac847b09c22ae03d7a91185d63
Author: Andrew Stubbs <ams@codesourcery.com>
Date: Thu Apr 20 11:11:13 2023 +0100
amdgcn: bug fix ldexp insn
The vop3 instructions don't support B constraint immediates.
Also, take the use the SV_FP iterator to delete a redundant pattern.
gcc/ChangeLog:
* config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
(ldexp<mode>3): Delete.
(ldexp<mode>3<exec>): Change "B" to "A".
Diff:
---
gcc/ChangeLog.omp | 9 +++++++++
gcc/config/gcn/gcn-valu.md | 25 +++++++++----------------
2 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index 5fea0ebc96a..72948e409f8 100644
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,12 @@
+2023-04-21 Andrew Stubbs <ams@codesourcery.com>
+
+ Backport from mainline:
+ Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
+ (ldexp<mode>3): Delete.
+ (ldexp<mode>3<exec>): Change "B" to "A".
+
2023-04-20 Andrew Stubbs <ams@codesourcery.com>
Backport from mainline:
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 3628e190eb1..ae532d9d3d8 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -208,7 +208,9 @@
(V64HF "HF") (V64SF "SF") (V64DI "DI") (V64DF "DF")])
(define_mode_attr vnsi
- [(V2QI "v2si") (V2HI "v2si") (V2HF "v2si") (V2SI "v2si")
+ [(QI "si") (HI "si") (SI "si")
+ (HF "si") (SF "si") (DI "si") (DF "si")
+ (V2QI "v2si") (V2HI "v2si") (V2HF "v2si") (V2SI "v2si")
(V2SF "v2si") (V2DI "v2si") (V2DF "v2si")
(V4QI "v4si") (V4HI "v4si") (V4HF "v4si") (V4SI "v4si")
(V4SF "v4si") (V4DI "v4si") (V4DF "v4si")
@@ -222,7 +224,9 @@
(V64SF "v64si") (V64DI "v64si") (V64DF "v64si")])
(define_mode_attr VnSI
- [(V2QI "V2SI") (V2HI "V2SI") (V2HF "V2SI") (V2SI "V2SI")
+ [(QI "SI") (HI "SI") (SI "SI")
+ (HF "SI") (SF "SI") (DI "SI") (DF "SI")
+ (V2QI "V2SI") (V2HI "V2SI") (V2HF "V2SI") (V2SI "V2SI")
(V2SF "V2SI") (V2DI "V2SI") (V2DF "V2SI")
(V4QI "V4SI") (V4HI "V4SI") (V4HF "V4SI") (V4SI "V4SI")
(V4SF "V4SI") (V4DI "V4SI") (V4DF "V4SI")
@@ -3102,21 +3106,10 @@
; Implement ldexp pattern
-(define_insn "ldexp<mode>3"
- [(set (match_operand:FP 0 "register_operand" "=v")
- (unspec:FP
- [(match_operand:FP 1 "gcn_alu_operand" "vB")
- (match_operand:SI 2 "gcn_alu_operand" "vSvA")]
- UNSPEC_LDEXP))]
- ""
- "v_ldexp%i0\t%0, %1, %2"
- [(set_attr "type" "vop3a")
- (set_attr "length" "8")])
-
(define_insn "ldexp<mode>3<exec>"
- [(set (match_operand:V_FP 0 "register_operand" "= v")
- (unspec:V_FP
- [(match_operand:V_FP 1 "gcn_alu_operand" " vB")
+ [(set (match_operand:SV_FP 0 "register_operand" "= v")
+ (unspec:SV_FP
+ [(match_operand:SV_FP 1 "gcn_alu_operand" " vA")
(match_operand:<VnSI> 2 "gcn_alu_operand" "vSvA")]
UNSPEC_LDEXP))]
""
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