[gcc(refs/users/meissner/heads/work119)] Combine vec_extract of V4SF with DF convert with variable element.

[gcc(refs/users/meissner/heads/work119)] Combine vec_extract of V4SF with DF convert with variable element.

[Michael Meissner]

https://gcc.gnu.org/g:2b55251044c9884dd0b350b218a43caf0fe93646

commit 2b55251044c9884dd0b350b218a43caf0fe93646
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Apr 21 19:27:45 2023 -0400

    Combine vec_extract of V4SF with DF convert with variable element.
    
    This patch adds a combine insn that merges loading up a vec_extract of V4SFmode
    where the element number is variable combined with a conversion to DFmode.
    
    2023-04-21   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/vsx.md (vsx_extract_v4sf_var_load_to_df): New insn.

Diff:
---
 gcc/config/rs6000/vsx.md | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 7a5daa65472..04877dd51f6 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3624,6 +3624,25 @@
 }
   [(set_attr "type" "fpload,load")])
 
+;; V4SF extract from memory with variable element number and convert to DFmode.
+(define_insn_and_split "*vsx_extract_v4sf_var_load_to_df"
+  [(set (match_operand:DF 0 "gpc_reg_operand" "=wa")
+	(float_extend:DF
+	 (unspec:SF [(match_operand:V4SF 1 "memory_operand" "Q")
+		     (match_operand:DI 2 "gpc_reg_operand" "r")]
+		    UNSPEC_VSX_EXTRACT)))
+   (clobber (match_scratch:DI 3 "=&b"))]
+  "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_DIRECT_MOVE_64BIT"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0)
+	(float_extend:DF (match_dup 4)))]
+{
+  operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
+					   operands[3], SFmode);
+}
+  [(set_attr "type" "fpload")])
+
 ;; Expand the builtin form of xxpermdi to canonical rtl.
 (define_expand "vsx_xxpermdi_<mode>"
   [(match_operand:VSX_L 0 "vsx_register_operand")