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From: Kito Cheng <kito@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r14-184] RISC-V: Add function comment for cleanup_insns.
Date: Mon, 24 Apr 2023 06:20:06 +0000 (GMT)	[thread overview]
Message-ID: <20230424062006.741F33858C2B@sourceware.org> (raw)

https://gcc.gnu.org/g:c5a1fa59ae3f44059a79086cbc506800d4149b69

commit r14-184-gc5a1fa59ae3f44059a79086cbc506800d4149b69
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Sun Apr 23 19:33:54 2023 +0800

    RISC-V: Add function comment for cleanup_insns.
    
    Add more comment for cleanup_insns.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
            comment for cleanup_insns.

Diff:
---
 gcc/config/riscv/riscv-vsetvl.cc | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index ac99028df43..fa68b8a0462 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -3998,6 +3998,21 @@ pass_vsetvl::pre_vsetvl (void)
     commit_edge_insertions ();
 }
 
+/* Before VSETVL PASS, RVV instructions pattern is depending on AVL operand
+   implicitly. Since we will emit VSETVL instruction and make RVV instructions
+   depending on VL/VTYPE global status registers, we remove the such AVL operand
+   in the RVV instructions pattern here in order to remove AVL dependencies when
+   AVL operand is a register operand.
+
+   Before the VSETVL PASS:
+     li a5,32
+     ...
+     vadd.vv (..., a5)
+   After the VSETVL PASS:
+     li a5,32
+     vsetvli zero, a5, ...
+     ...
+     vadd.vv (..., const_int 0).  */
 void
 pass_vsetvl::cleanup_insns (void) const
 {

                 reply	other threads:[~2023-04-24  6:20 UTC|newest]

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