[gcc r14-421] Docs: Add vector register constarint for asm operands

[gcc r14-421] Docs: Add vector register constarint for asm operands

[Kito Cheng]

https://gcc.gnu.org/g:e8511cbba692a9f3ff4d9c74e902fab03f154bbd

commit r14-421-ge8511cbba692a9f3ff4d9c74e902fab03f154bbd
Author: Kito Cheng <kito.cheng@sifive.com>
Date:   Thu Apr 27 22:00:39 2023 +0800

    Docs: Add vector register constarint for asm operands
    
    `vr`, `vm` and `vd` constarint for vector register constarint, those 3
    constarint has implemented on LLVM as well.
    
    gcc/ChangeLog:
    
            * doc/md.texi (RISC-V): Add vr, vm, vd constarint.

Diff:
---
 gcc/doc/md.texi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 07bf8bdebff..cc4a93a8763 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3535,6 +3535,15 @@ An address that is held in a general-purpose register.
 @item S
 A constraint that matches an absolute symbolic address.
 
+@item vr
+A vector register (if available)..
+
+@item vd
+A vector register, excluding v0 (if available).
+
+@item vm
+A vector register, only v0 (if available).
+
 @end table
 
 @item RX---@file{config/rx/constraints.md}