[gcc/riscv/heads/gcc-13-with-riscv-opts] (30 commits) Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

[gcc/riscv/heads/gcc-13-with-riscv-opts] (30 commits) Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

[Jeff Law]

The branch 'riscv/heads/gcc-13-with-riscv-opts' was updated to point to:

 a3a7e8e1fd4... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

It previously pointed to:

 254ca311953... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
-------------------------------------------------------------------

  254ca31... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c


Summary of changes (added commits):
-----------------------------------

  a3a7e8e... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
  f02abc2... RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
  32d2f01... RISC-V: Reorganize riscv-v.cc
  717961c... RISC-V: Split arguments of expand_vec_perm
  02ebc38... RISC-V: Remove redundant vlmul_ext_* patterns to fix PR1101
  3690ad1... RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
  9463f6c... RISC-V: Move optimization patterns into autovec-opt.md
  aaa7400... RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
  2189799... [RISC-V] fix cfi issue in save-restore.
  467e03b... Remove unnecessary md pattern for TARGET_XTHEADCONDMOV
  a34ea2a... RISC-V: Fix warning in predicated.md
  d71d810... RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv ins
  abcc3ad... VECT: Change flow of decrement IV
  e01aa15... RISC-V: Add _mu C++ overloaded intrinsics for load && viota
  bce4711... RISC-V: Optimize reverse series index vector
  0046b8c... RISC-V: Fix warning in predicated.md
  22ddc61... RISC-V: Add test for vfloat16*_t (non tuple) types
  8f59749... RISC-V: Add __RISCV_ prefix to VXRM and FRM enum
  5eb44c6... RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering o
  db1d38e... RISC-V: Support RVV permutation auto-vectorization
  52636b3... testsuite: Unbork multilib setups using -march flags (RISC-
  756c36b... RISC-V: Introduce vfloat16m{f}*_t and their machine mode.
  88ca3b0... RISC-V: Add RVV FRM enum for floating-point rounding mode i
  d483962... RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering 
  ee7abd8... RISC-V: Add testcase for vrsub.vi auto-vectorization
  94d27ee... RISC-V: Remove FRM for vfwcvt (RVV float to float widening 
  2b281ab... RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to floa
  da4570c... RISC-V: Remove FRM for vfncvt.rod instruction
  5c8f937... RISC-V: Add ZVFH extension to the -march= option
  1f6ec60... RISC-V: Fix unreachable test code for init repeat sequence.