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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
@ 2023-06-05 16:17 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-06-05 16:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e01aa150fd6744cffcee7ae5d513c38f2aee2d04
commit e01aa150fd6744cffcee7ae5d513c38f2aee2d04
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Fri Jun 2 10:04:47 2023 +0800
RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
Base on these:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
Add _mu C++ overloaded intrinsics for load && viota && vid.
Co-authored-by: KuanLin Chen <best124612@gmail.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
* config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
Diff:
---
gcc/config/riscv/riscv-vector-builtins-bases.cc | 17 +++++++++++------
gcc/config/riscv/riscv-vector-builtins-shapes.cc | 5 ++---
2 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 3f92084929d..09870c327fa 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -164,7 +164,7 @@ public:
{
if (STORE_P || LST_TYPE == LST_INDEXED)
return true;
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -967,7 +967,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -983,7 +983,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -1715,6 +1715,11 @@ public:
return CP_READ_MEMORY | CP_WRITE_CSR;
}
+ bool can_be_overloaded_p (enum predication_type_index pred) const override
+ {
+ return pred != PRED_TYPE_none;
+ }
+
gimple *fold (gimple_folder &f) const override
{
return fold_fault_load (f);
@@ -1753,7 +1758,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1798,7 +1803,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1888,7 +1893,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
gimple *fold (gimple_folder &f) const override
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 76262f07ce4..c8daae01f91 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -550,9 +550,8 @@ struct fault_load_def : public build_base
char *get_name (function_builder &b, const function_instance &instance,
bool overloaded_p) const override
{
- if (overloaded_p)
- if (instance.pred == PRED_TYPE_none || instance.pred == PRED_TYPE_mu)
- return nullptr;
+ if (overloaded_p && !instance.base->can_be_overloaded_p (instance.pred))
+ return nullptr;
tree type = builtin_types[instance.type.index].vector;
machine_mode mode = TYPE_MODE (type);
int sew = GET_MODE_BITSIZE (GET_MODE_INNER (mode));
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
@ 2023-07-14 2:42 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-07-14 2:42 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:13c44d1891052ad314e4ef25d0555b03b6630d97
commit 13c44d1891052ad314e4ef25d0555b03b6630d97
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Fri Jun 2 10:04:47 2023 +0800
RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
Base on these:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
Add _mu C++ overloaded intrinsics for load && viota && vid.
Co-authored-by: KuanLin Chen <best124612@gmail.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
* config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
Diff:
---
gcc/config/riscv/riscv-vector-builtins-bases.cc | 17 +++++++++++------
gcc/config/riscv/riscv-vector-builtins-shapes.cc | 5 ++---
2 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 3f92084929d..09870c327fa 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -164,7 +164,7 @@ public:
{
if (STORE_P || LST_TYPE == LST_INDEXED)
return true;
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -967,7 +967,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -983,7 +983,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -1715,6 +1715,11 @@ public:
return CP_READ_MEMORY | CP_WRITE_CSR;
}
+ bool can_be_overloaded_p (enum predication_type_index pred) const override
+ {
+ return pred != PRED_TYPE_none;
+ }
+
gimple *fold (gimple_folder &f) const override
{
return fold_fault_load (f);
@@ -1753,7 +1758,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1798,7 +1803,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1888,7 +1893,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
gimple *fold (gimple_folder &f) const override
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 76262f07ce4..c8daae01f91 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -550,9 +550,8 @@ struct fault_load_def : public build_base
char *get_name (function_builder &b, const function_instance &instance,
bool overloaded_p) const override
{
- if (overloaded_p)
- if (instance.pred == PRED_TYPE_none || instance.pred == PRED_TYPE_mu)
- return nullptr;
+ if (overloaded_p && !instance.base->can_be_overloaded_p (instance.pred))
+ return nullptr;
tree type = builtin_types[instance.type.index].vector;
machine_mode mode = TYPE_MODE (type);
int sew = GET_MODE_BITSIZE (GET_MODE_INNER (mode));
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-07-14 2:42 UTC | newest]
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2023-06-05 16:17 [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid Jeff Law
2023-07-14 2:42 Jeff Law
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