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From: Jeff Law <law@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in predicated.md Date: Mon, 5 Jun 2023 16:18:04 +0000 (GMT) [thread overview] Message-ID: <20230605161804.668F23883016@sourceware.org> (raw) https://gcc.gnu.org/g:a34ea2ad07f762375effd2f78ad3f5c98261cdbf commit a34ea2ad07f762375effd2f78ad3f5c98261cdbf Author: Juzhe-Zhong <juzhe.zhong@rivai.ai> Date: Fri Jun 2 17:33:33 2023 +0800 RISC-V: Fix warning in predicated.md Notice there is warning in predicates.md: ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’: ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] (match_test "INTVAL (op) == GET_MODE_MASK (HImode) ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] || INTVAL (op) == GET_MODE_MASK (SImode)")))) gcc/ChangeLog: * config/riscv/predicates.md: Change INTVAL into UINTVAL. Diff: --- gcc/config/riscv/predicates.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md index d14b1ca30bb..04ca6ceabc7 100644 --- a/gcc/config/riscv/predicates.md +++ b/gcc/config/riscv/predicates.md @@ -30,7 +30,7 @@ (define_predicate "arith_operand_or_mode_mask" (ior (match_operand 0 "arith_operand") (and (match_code "const_int") - (match_test "INTVAL (op) == GET_MODE_MASK (HImode) + (match_test "UINTVAL (op) == GET_MODE_MASK (HImode) || UINTVAL (op) == GET_MODE_MASK (SImode)")))) (define_predicate "lui_operand"
next reply other threads:[~2023-06-05 16:18 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-06-05 16:18 Jeff Law [this message] -- strict thread matches above, loose matches on Subject: below -- 2023-07-14 2:42 Jeff Law 2023-07-14 2:42 Jeff Law 2023-06-05 16:17 Jeff Law
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