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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in predicated.md
@ 2023-06-05 16:18 Jeff Law
  0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2023-06-05 16:18 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:a34ea2ad07f762375effd2f78ad3f5c98261cdbf

commit a34ea2ad07f762375effd2f78ad3f5c98261cdbf
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Jun 2 17:33:33 2023 +0800

    RISC-V: Fix warning in predicated.md
    
    Notice there is warning in predicates.md:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
                 (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
         || INTVAL (op) == GET_MODE_MASK (SImode)"))))
    
    gcc/ChangeLog:
    
            * config/riscv/predicates.md: Change INTVAL into UINTVAL.

Diff:
---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index d14b1ca30bb..04ca6ceabc7 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -30,7 +30,7 @@
 (define_predicate "arith_operand_or_mode_mask"
   (ior (match_operand 0 "arith_operand")
        (and (match_code "const_int")
-            (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
+            (match_test "UINTVAL (op) == GET_MODE_MASK (HImode)
 			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
 
 (define_predicate "lui_operand"

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in predicated.md
@ 2023-07-14  2:42 Jeff Law
  0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2023-07-14  2:42 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:2efb0b56bc5e7dffbb3c9c567c63745cdafab85e

commit 2efb0b56bc5e7dffbb3c9c567c63745cdafab85e
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Jun 2 17:33:33 2023 +0800

    RISC-V: Fix warning in predicated.md
    
    Notice there is warning in predicates.md:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
                 (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
         || INTVAL (op) == GET_MODE_MASK (SImode)"))))
    
    gcc/ChangeLog:
    
            * config/riscv/predicates.md: Change INTVAL into UINTVAL.

Diff:
---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index d14b1ca30bb..04ca6ceabc7 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -30,7 +30,7 @@
 (define_predicate "arith_operand_or_mode_mask"
   (ior (match_operand 0 "arith_operand")
        (and (match_code "const_int")
-            (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
+            (match_test "UINTVAL (op) == GET_MODE_MASK (HImode)
 			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
 
 (define_predicate "lui_operand"

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in predicated.md
@ 2023-07-14  2:42 Jeff Law
  0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2023-07-14  2:42 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:eb2c2d5cab2220bd62de668e091b6eaa081666a1

commit eb2c2d5cab2220bd62de668e091b6eaa081666a1
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Jun 2 11:04:43 2023 +0800

    RISC-V: Fix warning in predicated.md
    
    Notice there is warning in predicates.md:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
                 (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
         || INTVAL (op) == GET_MODE_MASK (SImode)"))))
    
    gcc/ChangeLog:
    
            * config/riscv/predicates.md: Change INTVAL into UINTVAL.

Diff:
---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 1ed84850e35..d14b1ca30bb 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -31,7 +31,7 @@
   (ior (match_operand 0 "arith_operand")
        (and (match_code "const_int")
             (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
-			 || INTVAL (op) == GET_MODE_MASK (SImode)"))))
+			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
 
 (define_predicate "lui_operand"
   (and (match_code "const_int")

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in predicated.md
@ 2023-06-05 16:17 Jeff Law
  0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2023-06-05 16:17 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:0046b8cfa00f4118722e30b5f62d47dffff4263d

commit 0046b8cfa00f4118722e30b5f62d47dffff4263d
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Jun 2 11:04:43 2023 +0800

    RISC-V: Fix warning in predicated.md
    
    Notice there is warning in predicates.md:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
                 (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
    ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
         || INTVAL (op) == GET_MODE_MASK (SImode)"))))
    
    gcc/ChangeLog:
    
            * config/riscv/predicates.md: Change INTVAL into UINTVAL.

Diff:
---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 1ed84850e35..d14b1ca30bb 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -31,7 +31,7 @@
   (ior (match_operand 0 "arith_operand")
        (and (match_code "const_int")
             (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
-			 || INTVAL (op) == GET_MODE_MASK (SImode)"))))
+			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
 
 (define_predicate "lui_operand"
   (and (match_code "const_int")

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-07-14  2:42 UTC | newest]

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