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From: Jeff Law <law@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] Remove unnecessary md pattern for TARGET_XTHEADCONDMOV Date: Mon, 5 Jun 2023 16:18:09 +0000 (GMT) [thread overview] Message-ID: <20230605161809.7B2163882ADB@sourceware.org> (raw) https://gcc.gnu.org/g:467e03b8116ccbff2f5e2bec5d1fa0bf1fe39b67 commit 467e03b8116ccbff2f5e2bec5d1fa0bf1fe39b67 Author: Die Li <lidie@eswincomputing.com> Date: Sat Jun 3 11:02:09 2023 -0600 Remove unnecessary md pattern for TARGET_XTHEADCONDMOV There are 2 small changes in this patch, but they do not affect the result. 1. Remove unnecessary md pattern for TARGET_XTHEADCONDMOV in thead.md. The operands[4] in "if_then_else" are always comparison operations, so the generated rtl does not match the pattern that is expected to be deleted. 2. Change operands[4] from const0_rtx to operands[1] to maintain rtl consistency. Although when output assembly, only operands[4] CODE will affect the output result. Signed-off-by: Die Li <lidie@eswincomputing.com> gcc/ChangeLog: * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete. Diff: --- gcc/config/riscv/thead.md | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md index 0623607d3dc..ea377872bde 100644 --- a/gcc/config/riscv/thead.md +++ b/gcc/config/riscv/thead.md @@ -120,25 +120,12 @@ /* Invert the condition and take else-block. */ rtx_code code = GET_CODE (operands[4]); code = (code == EQ) ? NE : EQ; - operands[4] = gen_rtx_fmt_ee (code, VOIDmode, const0_rtx, const0_rtx); + operands[4] = gen_rtx_fmt_ee (code, VOIDmode, operands[1], const0_rtx); return "th.mv%C4z\t%0,%z3,%1"; } [(set_attr "type" "condmove") (set_attr "mode" "<GPR:MODE>")]) -(define_insn "*th_cond_gpr_mov<GPR:mode><GPR2:mode>" - [(set (match_operand:GPR 0 "register_operand" "=r,r") - (if_then_else:GPR - (match_operand:GPR2 1 "register_operand" "r,r") - (match_operand:GPR 2 "reg_or_0_operand" "rJ,0") - (match_operand:GPR 3 "reg_or_0_operand" "0,rJ")))] - "TARGET_XTHEADCONDMOV" - "@ - th.mvnez\t%0,%z2,%1 - th.mveqz\t%0,%z3,%1" - [(set_attr "type" "condmove") - (set_attr "mode" "<GPR:MODE>")]) - ;; XTheadFmv ;; In RV32, we lack fmv.x.d and fmv.d.x, but XTheadFmv has instructions
next reply other threads:[~2023-06-05 16:18 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-06-05 16:18 Jeff Law [this message] 2023-07-14 2:42 Jeff Law
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