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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner
Date: Fri,  9 Jun 2023 01:33:30 +0000 (GMT)	[thread overview]
Message-ID: <20230609013330.9EA133858438@sourceware.org> (raw)

https://gcc.gnu.org/g:7dd6680a5397d2f23f4fba8bb91f7739bd244e23

commit 7dd6680a5397d2f23f4fba8bb91f7739bd244e23
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Jun 8 21:33:22 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 40 +++++++++++++++++++---------------------
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 63644d60a12..3bca12eb10e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -10,28 +10,29 @@ There are several problems with the current GCC:
 
     1)	The prefixed attribute was not checking insns with the type
 	fused_load_cmpi for being load insns.  This meant if the load + compare
-	fusion was not split, it would not know that the load should be
-	prefixed.
+	fusion was not split, the insn size might be off, and the wrong
+	instruction might be generated.
 
-    2)	The recognition of LWA for being prefixed looks at the "sign_extend"
-	attribute and whether the register mode was different than the memory
-	load (i.e. does it have a sign_extend wrapper around the load).
+    2)	The code in prefixed_load_p looks at the "sign_extend" attribute and
+	whether the register mode was different than the memory for SImode loads
+	to detect LWA instructions.
 
     3)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    4)	There is a lwa_operand predicate that should be used instead of
-	ds_form_mem_operand for the LWA instruction.
+    4)	The code to determine whether to split the insn if it has a prefixed
+	address was passing in SImode.  For LWA, we need to pass in DImode and
+	not SImode to properly determine if the address is prefixed.
 
-The main fix is to modify genfusion.pl that it sets the appropriate predicates
-and constraints.
+The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
+"m" for the ld and lwa instructions.
 
-I also added support in genfusion.md so that if we are doing a LWA operation and
-just setting the CC bits (throwing away the result of the load after the
-comparison), it generates a LWZ instruction and does a CMPWI instead of CMPDI.
-This way those loads can use normal D-FORM restrictions instead of DS-form.
+I also set the signed attribute on the HI/SImode loads that do sign extension.
 
-I set the "sign_extend" attribute on the cases that generate LWA.
+I modified the predicate for lwa to use lwa_operand instead of the predicate
+ds_form_mem_operand.  This predicate has direct checks to prevent a prefixed lwa
+from being generated.  I also modified the condition for the insn splitter so
+that it passes DImode for the lwa instructions and not SImode.
 
 I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
 
@@ -39,11 +40,8 @@ I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
 
 gcc/
 
-	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix constraints and
-	predicates for LD and LWA.  Optimize LWA/CMPDI to generate LWZ/CMPWI if
-	we don't need the result of the load after the comparison.  Set the
-	sign_extend attribute for LWA instruction.  For LWA where we do not need
-	the result of the load after the comparison, use LWZ and CMPWI.
+	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
+	allowed prefixed lwa to be generated.
 	* config/rs6000/fusion.md: Regenerate.
 	* config/rs6000/rs6000.md (prefixed attribute): Treat fused_load_cmpi
 	insns as being load insns.
@@ -51,8 +49,8 @@ gcc/
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
-	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust names and insn counts
-	for PR target/105325 fix.
+
+==================== Branch work122, patch #2 was reverted ====================
 
 ==================== Branch work122, patch #1 was reverted ====================

             reply	other threads:[~2023-06-09  1:33 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-09  1:33 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2023-06-13 23:25 Michael Meissner
2023-06-13 17:23 Michael Meissner
2023-06-13  2:58 Michael Meissner
2023-06-09 21:06 Michael Meissner
2023-06-09  6:10 Michael Meissner
2023-06-09  4:18 Michael Meissner
2023-06-08 16:54 Michael Meissner
2023-06-07 20:58 Michael Meissner
2023-06-07 18:57 Michael Meissner

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