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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work122)] Revert patches Date: Fri, 9 Jun 2023 05:47:12 +0000 (GMT) [thread overview] Message-ID: <20230609054712.449193858C20@sourceware.org> (raw) https://gcc.gnu.org/g:f0bbe68fac986be3d19079204eff36d411196d13 commit f0bbe68fac986be3d19079204eff36d411196d13 Author: Michael Meissner <meissner@linux.ibm.com> Date: Fri Jun 9 01:47:09 2023 -0400 Revert patches Diff: --- gcc/config/rs6000/fusion.md | 19 +++++++------------ gcc/config/rs6000/genfusion.pl | 16 +++------------- gcc/testsuite/g++.target/powerpc/pr105325.C | 26 -------------------------- 3 files changed, 10 insertions(+), 51 deletions(-) diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index bdcb2aba4fe..d45fb138a70 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -22,7 +22,7 @@ ;; load mode is DI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ") + (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -43,7 +43,7 @@ ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ") + (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -64,7 +64,7 @@ ;; load mode is DI result mode is DI compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ") + (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -85,7 +85,7 @@ ;; load mode is DI result mode is DI compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ") + (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -106,7 +106,7 @@ ;; load mode is SI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "lwa_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -121,7 +121,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -149,7 +148,7 @@ ;; load mode is SI result mode is SI compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "lwa_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -164,7 +163,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -192,7 +190,7 @@ ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "lwa_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION)" @@ -207,7 +205,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -250,7 +247,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -293,7 +289,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index 44a2e2ab4c3..82e8f863b02 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -62,11 +62,9 @@ sub gen_ld_cmpi_p10_one my $extend; if ($ccmode eq "CC") { - # ld and lwa are both DS-FORM. lwa needs to use lwa_operand to properly - # reject prefixed addresses. + # ld and lwa are both DS-FORM. ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS"; - ($lmode eq "DI") and $mempred = "ds_form_mem_operand"; - ($lmode eq "SI") and $mempred = "lwa_operand"; + ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand"; } else { if ($lmode eq "DI") { # ld is DS-form, but lwz is not. @@ -93,13 +91,12 @@ sub gen_ld_cmpi_p10_one } my $ldst = mode_to_ldst_char($lmode); - my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m"; print <<HERE; ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend (define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}" [(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x") - (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}") + (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m") HERE print " " if $ccmode eq "CCUNS"; print <<HERE; @@ -143,13 +140,6 @@ HERE "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") -HERE - - if ($ccmode eq "CC" && $lmode ne "DI") { - print " (set_attr \"sign_extend\" \"yes\")\n"; - } - - print <<HERE; (set_attr "length" "8")]) HERE diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C deleted file mode 100644 index d0e66a0b897..00000000000 --- a/gcc/testsuite/g++.target/powerpc/pr105325.C +++ /dev/null @@ -1,26 +0,0 @@ -/* { dg-do assemble } */ -/* { dg-require-effective-target lp64 } */ -/* { dg-require-effective-target power10_ok } */ -/* { dg-require-effective-target powerpc_prefixed_addr } */ -/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */ - -/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair - instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion - load + compare -1/0/1 patterns did not handle the possibility that the load - might be prefixed. The -fstack-protector option is needed to show the - bug. */ - -struct Ath__array1D { - int _current; - int getCnt() { return _current; } -}; -struct extMeasure { - int _mapTable[10000]; - Ath__array1D _metRCTable; -}; -void measureRC() { - extMeasure m; - for (; m._metRCTable.getCnt();) - for (;;) - ; -}
next reply other threads:[~2023-06-09 5:47 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-06-09 5:47 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2023-06-13 18:00 Michael Meissner 2023-06-13 16:21 Michael Meissner 2023-06-09 22:07 Michael Meissner 2023-06-09 16:53 Michael Meissner 2023-06-09 3:18 Michael Meissner 2023-06-09 1:27 Michael Meissner 2023-06-09 1:26 Michael Meissner 2023-06-09 0:36 Michael Meissner 2023-06-08 21:18 Michael Meissner 2023-06-08 20:22 Michael Meissner 2023-06-08 20:20 Michael Meissner 2023-06-08 20:16 Michael Meissner 2023-06-08 15:56 Michael Meissner 2023-06-08 14:20 Michael Meissner 2023-06-07 20:01 Michael Meissner
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