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* [gcc r14-1699] Daily bump.
@ 2023-06-12 0:17 GCC Administrator
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From: GCC Administrator @ 2023-06-12 0:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:35e50a0eaaa51e736b40e6366b8a70c0a3c123ac
commit r14-1699-g35e50a0eaaa51e736b40e6366b8a70c0a3c123ac
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Mon Jun 12 00:16:56 2023 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 57 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/cp/ChangeLog | 15 +++++++++++++
gcc/testsuite/ChangeLog | 27 +++++++++++++++++++++++
libgfortran/ChangeLog | 8 +++++++
5 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9324ebab02c..f6867b77128 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,60 @@
+2023-06-11 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
+ Remove attribute values.
+ (insv_notbit): New post-reload insn.
+ (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
+ (*insv.not-bit.0_split, *insv.not-bit.7_split)
+ (*insv.xor-extract_split): Split to insv_notbit.
+ (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
+ (*insv.xor-extract): Remove post-reload insns.
+ * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
+ (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
+ [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
+ * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
+
+2023-06-11 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/109907
+ * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
+ (MSB, SIZE): New mode attributes.
+ (any_shift): New code iterator.
+ (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
+ (*lshr<mode>3_const_split): Add constraint alternative for
+ the case of shift-offset = MSB. Ditch "length" attribute.
+ (extzv<mode): New. replaces extzv. Adjust following patterns.
+ Use avr_out_extr, avr_out_extr_not to print asm.
+ (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
+ (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
+ * config/avr/constraints.md (C15, C23, C31, Yil): New
+ * config/avr/predicates.md (reg_or_low_io_operand)
+ (const7_operand, reg_or_low_io_operand)
+ (const15_operand, const_0_to_15_operand)
+ (const23_operand, const_0_to_23_operand)
+ (const31_operand, const_0_to_31_operand): New.
+ * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
+ * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
+ (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
+ MSB case to new insn constraint "r" for operands[1].
+ (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
+ Handle these cases.
+ (avr_rtx_costs_1): Adjust cost for a new pattern.
+
+2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
+ (vector_insn_info::parse_insn): Add rtx_insn parse.
+ (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
+ (get_first_vsetvl): New function.
+ (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
+ (pass_vsetvl::cleanup_insns): Remove it.
+ (pass_vsetvl::ssa_post_optimization): New function.
+ (has_no_uses): Ditto.
+ (pass_vsetvl::propagate_avl): Remove it.
+ (pass_vsetvl::df_post_optimization): New function.
+ (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
+ * config/riscv/riscv-vsetvl.h: Adapt declaration.
+
2023-06-10 Aldy Hernandez <aldyh@redhat.com>
* ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 0f040c2846a..995c0c1e119 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230611
+20230612
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index eba3898080c..04cae62a92d 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,18 @@
+2023-06-11 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/110122
+ * constexpr.cc (cxx_eval_call_expression): Synthesize defaulted
+ functions needed for constant evaluation.
+ (instantiate_cx_fn_r): Likewise.
+
+2023-06-11 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/110122
+ * pt.cc (lookup_template_class): Extend shortcut for looking up the
+ current class scope to consider outer class scopes too, and use
+ current_nonlambda_class_type instead of current_class_type. Only
+ call coerce_template_parms when specializing a primary template.
+
2023-06-10 Nathan Sidwell <nathan@acm.org>
PR c++/61663
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 72638233ba4..138f217be0b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,30 @@
+2023-06-11 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/110122
+ * g++.dg/cpp2a/nontype-class59.C: New test.
+
+2023-06-11 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/110122
+ * g++.dg/cpp2a/nontype-class57.C: New test.
+ * g++.dg/cpp2a/nontype-class58.C: New test.
+
+2023-06-11 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/109907
+ * gcc.target/avr/pr109907.c: New test.
+ * gcc.target/avr/torture/pr109907-1.c: New test.
+ * gcc.target/avr/torture/pr109907-2.c: New test.
+
+2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: Adapt test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: Ditto.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-21.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-22.c: New test.
+ * gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: New test.
+
2023-06-10 Nathan Sidwell <nathan@acm.org>
* g++.dg/template/pr61663.C: New.
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index 636eeb6bfa8..9edd4d78d9d 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,11 @@
+2023-06-11 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ PR libfortran/109373
+ * configure.ac: Remove support for --enable-intermodule
+ * Makefile.am: Remove onestep path.
+ * configure: Regenerate.
+ * Makefile.in: Regenerate.
+
2023-06-10 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
* ieee/ieee_arithmetic.F90: Add IEEE_MIN_NUM, IEEE_MAX_NUM,
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