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* [gcc r14-2003] aarch64: Fix gcc.target/aarch64/sve/pcs failures
@ 2023-06-20 20:48 Richard Sandiford
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From: Richard Sandiford @ 2023-06-20 20:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:079f31c553182f49eda70f4d4ce839c3e35bf6cf
commit r14-2003-g079f31c553182f49eda70f4d4ce839c3e35bf6cf
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Tue Jun 20 21:48:38 2023 +0100
aarch64: Fix gcc.target/aarch64/sve/pcs failures
Several gcc.target/aarch64/sve/pcs tests started failing after
6a2e8dcbbd4, because the tests weren't robust against whether
an indirect argument register or the stack pointer was used as
the base for stores.
The patch allows either base register when there is only one
indirect argument. It disables -fcprop-registers in cases where
there are sometimes multiple indirect arguments, since the name
of the argument register is then an important part of the test.
Disabling -fcprop-registers gives poor final register allocation,
since:
* combine's make_more_copies hack adds extra redundant moves
* code with those moves is not allocated as well as moves without them
* we often rely on -fcprop-registers to clean up the allocation later
The patch therefore disables combine in the same tests as
cprop-registers.
gcc/testsuite/
* gcc.target/aarch64/sve/pcs/args_1.c: Match moves from the stack
pointer to indirect argument registers and allow either to be used
as the base register in subsequent stores.
* gcc.target/aarch64/sve/pcs/args_8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_2.c: Allow the store of the
indirect argument to happen via the argument register or the
stack pointer.
* gcc.target/aarch64/sve/pcs/args_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_bf16.c: Disable
-fcprop-registers and combine.
* gcc.target/aarch64/sve/pcs/args_6_be_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_3_nosc.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_3_sc.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 6 ++++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_bf16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_bf16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s8.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u16.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u32.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u64.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u8.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_bf16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_bf16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c | 3 ++-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u16.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u32.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u64.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u8.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_nosc.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_sc.c | 2 +-
67 files changed, 95 insertions(+), 92 deletions(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c
index 4509fff223a..6deca329599 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c
@@ -31,11 +31,13 @@ callee_pred (__SVBool_t p0, __SVBool_t p1, __SVBool_t p2, __SVBool_t p3,
/*
** caller_pred:
** ...
+** mov x0, sp
** ptrue (p[0-9]+)\.b, vl5
-** str \1, \[x0\]
+** str \1, \[(?:x0|sp)\]
** ...
+** mov x1, sp
** ptrue (p[0-9]+)\.h, vl6
-** str \2, \[x1\]
+** str \2, \[(?:x1|sp)\]
** ptrue p3\.d, vl4
** ptrue p2\.s, vl3
** ptrue p1\.h, vl2
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c
index 29e80dc7733..3ad4454f8b1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c
@@ -64,7 +64,7 @@ caller_int (int8_t *x0, int16_t *x1, int32_t *x2, int64_t *x3)
/* { dg-final { scan-assembler {\tmov\tz6\.s, #6\n} } } */
/* { dg-final { scan-assembler {\tmov\tz7\.d, #7\n} } } */
/* { dg-final { scan-assembler {\tmov\tx4, sp\n} } } */
-/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #8\n.*\tst1b\t\1, p[0-7], \[x4\]\n} } } */
+/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #8\n.*\tst1b\t\1, p[0-7], \[(?:x4|sp)\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c
index 611f3d03bca..56896c93b52 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c
@@ -64,7 +64,7 @@ caller_uint (uint8_t *x0, uint16_t *x1, uint32_t *x2, uint64_t *x3)
/* { dg-final { scan-assembler {\tmov\tz6\.s, #6\n} } } */
/* { dg-final { scan-assembler {\tmov\tz7\.d, #7\n} } } */
/* { dg-final { scan-assembler {\tmov\tx4, sp\n} } } */
-/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #8\n.*\tst1b\t\1, p[0-7], \[x4\]\n} } } */
+/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #8\n.*\tst1b\t\1, p[0-7], \[(?:x4|sp)\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c
index c40d63e678e..7213c8695c1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c
@@ -64,7 +64,7 @@ caller_float (float16_t *x0, float16_t *x1, float32_t *x2, float64_t *x3)
/* { dg-final { scan-assembler {\tfmov\tz6\.s, #6\.0} } } */
/* { dg-final { scan-assembler {\tfmov\tz7\.d, #7\.0} } } */
/* { dg-final { scan-assembler {\tmov\tx4, sp\n} } } */
-/* { dg-final { scan-assembler {\tfmov\t(z[0-9]+\.h), #8\.0.*\tst1h\t\1, p[0-7], \[x4\]\n} } } */
+/* { dg-final { scan-assembler {\tfmov\t(z[0-9]+\.h), #8\.0.*\tst1h\t\1, p[0-7], \[(?:x4|sp)\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_bf16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_bf16.c
index 4002e047977..e5998ae488d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_bf16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_bf16.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f16.c
index 6faf8a3d547..707b7be4248 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f16.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f32.c
index 7abd279f21f..19e422fab17 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f32.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f64.c
index eea79659593..1c072c01d39 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_f64.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s16.c
index 59b17a4c9e3..3b486f9b767 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s16.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s32.c
index 8988f9c9ba9..3b3d72c2310 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s32.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s64.c
index 4719b4120e0..56346583824 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s64.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s8.c
index 995f3e70bf2..12fc2db996a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_s8.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3b\t{z4\.b - z6\.b}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1b\tz7\.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+\.b) - z[0-9]+\.b}.*\tst1b\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+\.b)}.*\tst1b\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+\.b) - z[0-9]+\.b}.*\tst1b\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+\.b)}.*\tst1b\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u16.c
index 0b84622ad4a..b18a825dc24 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u16.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+\.h) - z[0-9]+\.h}.*\tst1h\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+\.h)}.*\tst1h\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u32.c
index a5892f7b63b..b69efcad70d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u32.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+\.s) - z[0-9]+\.s}.*\tst1w\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+\.s)}.*\tst1w\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u64.c
index 67438e8e562..b06d3a87ca2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u64.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+\.d) - z[0-9]+\.d}.*\tst1d\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+\.d)}.*\tst1d\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u8.c
index 61d694c6c9c..a744278f287 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_be_u8.c
@@ -55,8 +55,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3b\t{z4\.b - z6\.b}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1b\tz7\.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+\.b) - z[0-9]+\.b}.*\tst1b\t\1, p[0-7], \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+\.b)}.*\tst1b\t\1, p[0-7], \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+\.b) - z[0-9]+\.b}.*\tst1b\t\1, p[0-7], \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+\.b)}.*\tst1b\t\1, p[0-7], \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_bf16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_bf16.c
index 94d84df4a55..4213caa39a6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_bf16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_bf16.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f16.c
index 6271365c7ff..57095a82252 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f16.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f32.c
index ef89de2161e..ca8a9743ddd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f32.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f64.c
index 4eddf2d1f4e..84a66c67ed7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_f64.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s16.c
index a4b6af0718b..1b4745154fc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s16.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s32.c
index 60b58d6fcbf..71436bcb4fc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s32.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s64.c
index b6126aa4c10..c83639fc6ec 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s64.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s8.c
index 5c16c3c8f2d..f7e8eac75ae 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_s8.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3b\t{z4\.b - z6\.b}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1b\tz7\.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+)\.b - z[0-9]+\.b}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+)\.b}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+)\.b - z[0-9]+\.b}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+)\.b}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u16.c
index 2b9a90025dc..b0c77d979e4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u16.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3h\t{z4\.h - z6\.h}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1h\tz7\.h, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{(z[0-9]+)\.h - z[0-9]+\.h}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2h\t{z[0-9]+\.h - (z[0-9]+)\.h}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u32.c
index 2902f59b447..dd4952d0e0f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u32.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u64.c
index 85b3cfdad66..d5ec0d7b9bb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u64.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3d\t{z4\.d - z6\.d}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1d\tz7\.d, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u8.c
index f56acb69356..8143188c143 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_5_le_u8.c
@@ -50,8 +50,8 @@ caller (void *x0)
/* { dg-final { scan-assembler {\tld3b\t{z4\.b - z6\.b}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1b\tz7\.b, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+)\.b - z[0-9]+\.b}.*\tstr\t\1, \[x1\]\n} } } */
-/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+)\.b}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{(z[0-9]+)\.b - z[0-9]+\.b}.*\tstr\t\1, \[(?:x1|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+\.b - (z[0-9]+)\.b}.*\tstr\t\1, \[(?:x1|sp), #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_bf16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_bf16.c
index 84d2c406cc5..5f741ae9174 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_bf16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_bf16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f16.c
index dd4ccc3b214..690426807cd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f32.c
index 26ea2a30825..313caa9e3c8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f64.c
index 62aded51cce..69a49d4aee3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_f64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s16.c
index 204ef9a92cb..c747d60395a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s32.c
index 9ae4567a47f..f3bdf940587 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s64.c
index 0b8a2e2133d..013691c5610 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s8.c
index 0afbe71aa82..d4d593ca0bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_s8.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u16.c
index f010f5ebb75..04f16d5a062 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u32.c
index 60d903a313b..73b03069284 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u64.c
index 948f426f91a..9edbfeb49ca 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u8.c
index 8049ec07857..d2bef6a46d8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_be_u8.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mbig-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_bf16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_bf16.c
index 3dc9e42ed18..ac6045daf31 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_bf16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_bf16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f16.c
index 80a2e3aae1a..450021df3dd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f32.c
index 40ff42128e4..0ece06b3d77 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f64.c
index ee219ccdc63..b93e3bf4219 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_f64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s16.c
index ade75cb342d..8563710fa29 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s32.c
index a6c06e235a5..b165b7653be 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s64.c
index 219c71d82f5..00dd9661dcb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s8.c
index c48d391ca84..51d0fb1671b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_s8.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u16.c
index 6c635fd9432..fd1f55f9e20 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u16.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u32.c
index c31d454262d..dcbfab863e1 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u32.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u64.c
index 969b258b7da..be9b2ff278c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u64.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u8.c
index d186047847a..c41e4f94bf8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_6_le_u8.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
+/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c
index 93ace26f548..c03b1659135 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c
@@ -25,4 +25,5 @@ caller (int8_t *x0, svbool_t p0, svint32x4_t z0, svint32x4_t z4)
callee (x0, 1, 2, 3, z0, z4, svdup_s8 (42), 5, p0, 6, 7);
}
-/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #42\n.*\tst1b\t\1, p[0-7], \[x4\]\n} } } */
+/* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #42\n.*\tst1b\t\1, p[0-7], \[(?:x4|sp)\]\n} } } */
+/* { dg-final { scan-assembler {\tmov\tx4, sp.*\tst1b\tz[0-9]+\.b, p[0-7], \[(?:x4|sp)\]\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_1.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_1.c
index 721e1060ff3..dcd278bd04d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f16.c
index 9b9162051a7..50e77f9ed57 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f16.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f32.c
index b979f43eac1..e7b092af5d2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f32.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f64.c
index 6f2235f0266..c3389a8a4c3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_f64.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s16.c
index 523d3becdb7..3c644e13428 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s16.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s32.c
index afde5a7151b..652d609d3e4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s32.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s64.c
index d119d0ae356..72ea6a345cf 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s64.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s8.c
index ce6d663ae09..02f4bec9a9c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_s8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u16.c
index 50ae7ba2454..b60d448c0dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u16.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u16.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u32.c
index d726c723df9..5f01464934d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u32.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u64.c
index ef1265c88b1..986739fdc36 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u64.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u64.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u8.c
index e6a82fed0bd..533cba67713 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_2_u8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-stack-clash-protection -g" } */
+/* { dg-options "-O2 -fno-stack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
#include <arm_sve.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_nosc.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_nosc.c
index cea69cc880b..986cba452c7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_nosc.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_nosc.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O0 -g" } */
+/* { dg-options "-O0 -fno-cprop-registers -fdisable-rtl-combine -g" } */
#include <arm_sve.h>
#include <stdarg.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_sc.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_sc.c
index b939aa5ea1b..b8c80fb77fb 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_sc.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/varargs_3_sc.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O0 -fstack-clash-protection -g" } */
+/* { dg-options "-O0 -fstack-clash-protection -fno-cprop-registers -fdisable-rtl-combine -g" } */
#include <arm_sve.h>
#include <stdarg.h>
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2023-06-20 20:48 [gcc r14-2003] aarch64: Fix gcc.target/aarch64/sve/pcs failures Richard Sandiford
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