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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.
@ 2023-06-26 20:55 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-06-26 20:55 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b5be247f6b4ed6703ee05193602d60543d01e956
commit b5be247f6b4ed6703ee05193602d60543d01e956
Author: Robin Dapp <rdapp@ventanamicro.com>
Date: Tue Jun 20 09:12:41 2023 +0200
RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.
I forgot to check for vfmul in the multiplication tests as well as
some -ffast-math arguments. Fix this.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vadd-run.c: Add
-ffast-math.
* gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Remove
-ffast-math
* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: Check for
vfmul.
* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: Dito.
Diff:
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c | 1 +
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c | 1 +
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c | 2 +-
5 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
index 5db0a3c79be..12fb952118e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
index 1a11fe0fb30..30b467f50c7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
index 1900c21121b..7d3dfade0ee 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
@@ -4,3 +4,4 @@
#include "vmul-template.h"
/* { dg-final { scan-assembler-times {\tvmul\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvfmul\.vv} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
index c8508bcc1f7..a549d6f7be4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
@@ -4,3 +4,4 @@
#include "vmul-template.h"
/* { dg-final { scan-assembler-times {\tvmul\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvfmul\.vv} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
index c6fe79e37b8..86607d03777 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
@@ -1,4 +1,4 @@
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv -mabi=ilp32d --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv -mabi=ilp32d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.
@ 2023-07-14 2:47 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-07-14 2:47 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:55fd2437e09eb4e04d774f9c526fddb6b3a37dc7
commit 55fd2437e09eb4e04d774f9c526fddb6b3a37dc7
Author: Robin Dapp <rdapp@ventanamicro.com>
Date: Tue Jun 20 09:12:41 2023 +0200
RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.
I forgot to check for vfmul in the multiplication tests as well as
some -ffast-math arguments. Fix this.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vadd-run.c: Add
-ffast-math.
* gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Remove
-ffast-math
* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: Check for
vfmul.
* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: Dito.
Diff:
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c | 1 +
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c | 1 +
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c | 2 +-
5 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
index 5db0a3c79be..12fb952118e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
index 1a11fe0fb30..30b467f50c7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
index 1900c21121b..7d3dfade0ee 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c
@@ -4,3 +4,4 @@
#include "vmul-template.h"
/* { dg-final { scan-assembler-times {\tvmul\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvfmul\.vv} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
index c8508bcc1f7..a549d6f7be4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c
@@ -4,3 +4,4 @@
#include "vmul-template.h"
/* { dg-final { scan-assembler-times {\tvmul\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvfmul\.vv} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
index c6fe79e37b8..86607d03777 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
@@ -1,4 +1,4 @@
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv -mabi=ilp32d --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv -mabi=ilp32d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-07-14 2:47 UTC | newest]
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2023-06-26 20:55 [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math Jeff Law
2023-07-14 2:47 Jeff Law
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