[gcc r14-2141] Daily bump.

[gcc r14-2141] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:878a9fee50b05c63200bd9a9d1e5189b304692ae

commit r14-2141-g878a9fee50b05c63200bd9a9d1e5189b304692ae
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Wed Jun 28 00:18:17 2023 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 141 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/ada/ChangeLog       |  69 ++++++++++++++++++++++++
 gcc/testsuite/ChangeLog |  92 +++++++++++++++++++++++++++++++
 4 files changed, 303 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9b70f38096f..fc328637850 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,144 @@
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md (<optab><vnconvert><mode>2): New
+	expander.
+	(<float_cvt><vnconvert><mode>2): Ditto.
+	(<optab><mode><vnconvert>2): Ditto.
+	(<float_cvt><mode><vnconvert>2): Ditto.
+	* config/riscv/vector-iterators.md: Add vnconvert.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
+	expander.
+	(extend<v_quad_trunc><mode>2): Ditto.
+	(trunc<mode><v_double_trunc>2): Ditto.
+	(trunc<mode><v_quad_trunc>2): Ditto.
+	* config/riscv/vector-iterators.md: Add VQEXTF and HF to
+	V_QUAD_TRUNC and v_quad_trunc.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
+	expander.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md (copysign<mode>3): Add expander.
+	(xorsign<mode>3): Ditto.
+	* config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
+	New class.
+	* config/riscv/vector-iterators.md (copysign): Remove ncopysign.
+	(xorsign): Ditto.
+	(n): Ditto.
+	(x): Ditto.
+	* config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
+	(@pred_ncopysign<mode>_scalar): Ditto.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md: VF_AUTO -> VF.
+	* config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
+	VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
+	VHF_LMUL1.
+	* config/riscv/vector.md: Use new iterators.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* match.pd: Use element_mode and check if target supports
+	operation with new type.
+
+2023-06-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svdupq_impl::fold_nonconst_dupq): New method.
+	(svdupq_impl::fold): Call fold_nonconst_dupq.
+
+2023-06-27  Andrew Pinski  <apinski@marvell.com>
+
+	PR middle-end/110420
+	PR middle-end/103979
+	PR middle-end/98619
+	* gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
+
+2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
+
+	* ipa-cp.cc (decide_whether_version_node): Adjust comment.
+	* ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
+	for Value_Range.
+	(set_switch_stmt_execution_predicate): Same.
+	* ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
+
+2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
+
+	* ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
+	ipa_vr instead of value_range.
+	(gt_pch_nx): Same.
+	(gt_ggc_mx): Same.
+	(ipa_get_value_range): Same.
+	* value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
+	ipa_vr.
+	(gt_ggc_mx): Same.
+
+2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
+
+	* ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
+	* ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
+	(ipa_set_jfunc_vr): Take a range.
+	(ipa_compute_jump_functions_for_edge): Pass range to
+	ipa_set_jfunc_vr.
+	(ipa_write_jump_function): Call streamer write helper.
+	(ipa_read_jump_function): Call streamer read helper.
+	* ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
+
+2023-06-27  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
+	as a probable initializer rather than a probable complete statement.
+
+2023-06-27  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/96208
+	* tree-vect-slp.cc (vect_build_slp_tree_1): Allow
+	a non-grouped load if it is the same for all lanes.
+	(vect_build_slp_tree_2): Handle not grouped loads.
+	(vect_optimize_slp_pass::remove_redundant_permutations):
+	Likewise.
+	(vect_transform_slp_perm_load_1): Likewise.
+	* tree-vect-stmts.cc (vect_model_load_cost): Likewise.
+	(get_group_load_store_type): Likewise.  Handle
+	invariant accesses.
+	(vectorizable_load): Likewise.
+
+2023-06-27  liuhongt  <hongtao.liu@intel.com>
+
+	PR rtl-optimization/110237
+	* config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
+	UNSPEC_MASKMOV.
+	(maskstore<mode><avx512fmaskmodelower): Ditto.
+	(*<avx512>_store<mode>_mask): New define_insn, it's renamed
+	from original <avx512>_store<mode>_mask.
+
+2023-06-27  liuhongt  <hongtao.liu@intel.com>
+
+	* config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
+	Move flag_expensive_optimizations && !optimize_size to ..
+	* config/i386/i386-options.cc (ix86_option_override_internal):
+	.. this, it makes -mvzeroupper independent of optimization
+	level, but still keeps the behavior of architecture
+	tuning(emit_vzeroupper) unchanged.
+
+2023-06-27  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/82735
+	* config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
+	vzeroupper for vzeroupper call_insn.
+
+2023-06-27  Andrew Pinski  <apinski@marvell.com>
+
+	* doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
+	defbuiltin usage.
+
 2023-06-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 36a241c62ca..fff3166d023 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230627
+20230628
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 5110f3de099..4111a2b6628 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,72 @@
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/Makefile.in (LIBIBERTY): Fix condition.
+	(TOOLS_LIBS): Add @LD_PICFLAG@.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/trans.cc (Subprogram_Body_to_gnu): Add guard to the
+	code turning the type of the RESULT_DECL into a reference type.
+	(maybe_make_gnu_thunk): Use a more precise guard in the same case.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/trans.cc (Case_Statement_to_gnu): Rename boolean
+	constant and use From_Conditional_Expression flag for its value.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* debug.adb (d.L): Remove documentation.
+	* exp_ch4.adb (Expand_N_Case_Expression): In the not-by-copy case,
+	do not wrap the case statement in an Expression_With_Actions node.
+	(Expand_N_If_Expression): Do not test
+	Back_End_Handles_Limited_Types
+	* gnat1drv.adb (Adjust_Global_Switches): Do not set it.
+	* opt.ads (Back_End_Handles_Limited_Types): Delete.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* sem_ch12.adb (Check_Generic_Actuals): Check the component type
+	of constants and variables of an array type.
+	(Copy_Generic_Node): Fix bogus handling of iterator
+	specifications.
+
+2023-06-27  Claire Dross  <dross@adacore.com>
+
+	* libgnat/a-textio.ads (Get_Line): Use Relaxed_Initialization on
+	the Item parameter of Get_Line.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_ch4.adb (Expand_N_Quantified_Expression): Revert the latest
+	change as it is subsumed by the machinery in Sem_Ch5.
+	* sem_ch5.adb (Prepare_Iterator_Loop): Also wrap the loop
+	statement in a block in the name contains a function call that
+	returns on the secondary stack.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* sem_ch12.adb (Scope_Within_Body_Or_Same): New predicate.
+	(Check_Actual_Type): Take into account packages nested in bodies
+	to compute the enclosing scope by means of
+	Scope_Within_Body_Or_Same.
+
+2023-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* sem_ch12.adb (Check_Private_View): Also check the type of
+	visible discriminants in record and concurrent types.
+
+2023-06-27  Viljar Indus  <indus@adacore.com>
+
+	* sprint.adb (Print_Node_Actual): Print homogeneous N_Aggregate
+	nodes with brackets.
+
+2023-06-27  Viljar Indus  <indus@adacore.com>
+
+	* exp_aggr.adb (Expand_N_Aggregate): Ensure that container
+	aggregate expressions do not get expanded as records but instead
+	as container aggregates.
+
 2023-06-20  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Variable>: Pass
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c237f050d1a..c8a9772846b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,95 @@
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c: New test.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c: New test.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-run.c: Adjust.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv32gcv.c:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv64gcv.c:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-template.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/conversions/vncvt-template.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/conversions/vsext-template.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/conversions/vzext-template.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/zvfhmin-1.c: Add int/float conversions.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c: New file.
+
+2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/binop/copysign-run.c: New test.
+	* gcc.target/riscv/rvv/autovec/binop/copysign-rv64gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/binop/copysign-rv32gcv.c: New test.
+	* gcc.target/riscv/rvv/autovec/binop/copysign-template.h: New test.
+	* gcc.target/riscv/rvv/autovec/binop/copysign-zvfh-run.c: New test.
+
+2023-06-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+	* gcc.target/aarch64/sve/acle/general/dupq_11.c: New test.
+
+2023-06-27  Andrew Pinski  <apinski@marvell.com>
+
+	PR middle-end/110420
+	PR middle-end/103979
+	PR middle-end/98619
+	* gcc.c-torture/compile/asmgoto-6.c: New test.
+
+2023-06-27  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/96208
+	* gcc.dg/vect/slp-46.c: Adjust for new vectorizations.
+	* gcc.dg/vect/bb-slp-pr65935.c: Adjust.
+
+2023-06-27  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/avx-vzeroupper-29.c: New testcase.
+
+2023-06-27  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/avx-vzeroupper-30.c: New test.
+
 2023-06-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* gcc.target/riscv/rvv/autovec/partial/slp-17.c: New test.