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* [gcc(refs/vendors/ARM/heads/morello)] Fixes for DBX_REGISTER_NUMBER and DWARF_FRAME_REGNUM
@ 2023-06-28 13:32 Alex Coplan
0 siblings, 0 replies; only message in thread
From: Alex Coplan @ 2023-06-28 13:32 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:64f559c922408c32bdb8c4ceadb32e95c346112a
commit 64f559c922408c32bdb8c4ceadb32e95c346112a
Author: Alex Coplan <alex.coplan@arm.com>
Date: Wed Apr 26 17:48:39 2023 +0100
Fixes for DBX_REGISTER_NUMBER and DWARF_FRAME_REGNUM
In f30724eac73a0b70f10426ee2806a3e5ef43bb46 we add a mode argument to
the target macros DBX_REGISTER_NUMBER and DWARF_FRAME_REGNUM but we
missed updating the definition of these target hooks for non-AArch64
targets. This patch fixes that up.
Diff:
---
gcc/config/alpha/alpha.h | 6 +++---
gcc/config/arc/arc.h | 6 +++---
gcc/config/arm/arm.h | 4 ++--
gcc/config/bfin/bfin.h | 4 ++--
gcc/config/c6x/c6x.h | 4 ++--
gcc/config/cr16/cr16.h | 2 +-
gcc/config/cris/cris.h | 6 +++---
gcc/config/csky/csky.h | 6 +++---
gcc/config/epiphany/epiphany.h | 3 ++-
gcc/config/frv/frv.h | 4 ++--
gcc/config/gcn/gcn-hsa.h | 2 +-
gcc/config/i386/cygming.h | 4 ++--
gcc/config/i386/darwin.h | 2 +-
gcc/config/i386/djgpp.h | 2 +-
gcc/config/i386/dragonfly.h | 2 +-
gcc/config/i386/freebsd.h | 2 +-
gcc/config/i386/gnu-user.h | 2 +-
gcc/config/i386/i386.h | 2 +-
gcc/config/i386/i386elf.h | 2 +-
gcc/config/i386/iamcu.h | 2 +-
gcc/config/i386/lynx.h | 2 +-
gcc/config/i386/netbsd-elf.h | 2 +-
gcc/config/i386/openbsdelf.h | 2 +-
gcc/config/i386/sysv4.h | 2 +-
gcc/config/i386/vxworks.h | 2 +-
gcc/config/i386/x86-64.h | 2 +-
gcc/config/ia64/sysv4.h | 2 +-
gcc/config/iq2000/iq2000.h | 2 +-
gcc/config/lm32/lm32.h | 2 +-
gcc/config/m32c/m32c.h | 4 ++--
gcc/config/m68k/linux.h | 2 +-
gcc/config/m68k/m68k.h | 4 ++--
gcc/config/m68k/m68kelf.h | 2 +-
gcc/config/m68k/netbsd-elf.h | 2 +-
gcc/config/microblaze/microblaze.h | 2 +-
gcc/config/mips/mips.h | 4 ++--
gcc/config/mmix/mmix.h | 4 ++--
gcc/config/msp430/msp430.c | 2 +-
gcc/config/nds32/nds32.h | 4 ++--
gcc/config/nvptx/nvptx.h | 2 +-
gcc/config/or1k/or1k.h | 2 +-
gcc/config/pa/pa.h | 2 +-
gcc/config/pa/pa32-regs.h | 4 ++--
gcc/config/pa/pa64-regs.h | 4 ++--
gcc/config/riscv/riscv.h | 2 +-
gcc/config/rs6000/rs6000.c | 2 +-
gcc/config/rs6000/rs6000.h | 6 +++---
gcc/config/s390/s390.h | 2 +-
gcc/config/sh/elf.h | 2 +-
gcc/config/sh/linux.h | 2 +-
gcc/config/sh/sh.h | 4 ++--
gcc/config/sparc/sparc.h | 2 +-
gcc/config/tilegx/tilegx.h | 2 +-
gcc/config/tilepro/tilepro.h | 2 +-
gcc/config/v850/v850.h | 3 ++-
gcc/config/visium/elf.h | 4 ++--
gcc/config/visium/visium.h | 2 +-
gcc/config/xtensa/xtensa.h | 4 ++--
gcc/dbxout.c | 10 +++++++---
gcc/defaults.h | 6 +++---
60 files changed, 95 insertions(+), 89 deletions(-)
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index b3b116b81c2..cb15ed499ea 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -638,12 +638,12 @@ enum reg_class {
can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same
as the default definition in dwarf2out.c. */
#undef DWARF_FRAME_REGNUM
-#define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) DBX_REGISTER_NUMBER (REG, MODE)
/* Before the prologue, RA lives in $26. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
-#define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26, Pmode)
+#define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64, Pmode)
#define DWARF_ZERO_REG 31
/* Describe how we implement __builtin_eh_return. */
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 1fa1952354b..b5569233fd0 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -1342,7 +1342,7 @@ do { \
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
/* How to renumber registers for dbx and gdb. */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
((TARGET_MULMAC_32BY16_SET && (REGNO) >= 56 && (REGNO) <= 57) \
? ((REGNO) ^ !TARGET_BIG_ENDIAN) \
: (TARGET_MUL64_SET && (REGNO) >= 57 && (REGNO) <= 58) \
@@ -1352,7 +1352,7 @@ do { \
: (REGNO))
/* Use gcc hard register numbering for eh_frame. */
-#define DWARF_FRAME_REGNUM(REG) (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) (REG, MODE)
/* Map register numbers held in the call frame info that gcc has
collected using DWARF_FRAME_REGNUM to those that should be output
@@ -1366,7 +1366,7 @@ do { \
: 57 + !!TARGET_MULMAC_32BY16_SET) /* MLO */ \
: (REGNO))
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (31)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (31, Pmode)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 31)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 6c62823e08a..8da3f2f43c9 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1058,7 +1058,7 @@ extern const int arm_arch_cde_coproc_bits[];
/* VFP (VFP3) adds 32 (64) + 1 VFPCC. */
#define FIRST_PSEUDO_REGISTER 107
-#define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO,MODE) arm_dbx_register_number (REGNO)
/* Value should be nonzero if functions must have frame pointers.
Zero means the frame pointer need not be set up (and parms may be accessed
@@ -2263,7 +2263,7 @@ extern int making_const_table;
dwarf2 unwind information. This also enables the table driven
mechanism. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM, Pmode)
/* Used to mask out junk bits from the return address, such as
processor state, interrupt status, condition codes and the like. */
diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h
index c06979eeb34..f8f24fd4d49 100644
--- a/gcc/config/bfin/bfin.h
+++ b/gcc/config/bfin/bfin.h
@@ -744,7 +744,7 @@ typedef struct {
#define RETURN_ADDR_RTX(COUNT, FRAME) bfin_return_addr_rtx (COUNT)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (REG_RETS)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (REG_RETS, Pmode)
/* Call instructions don't modify the stack pointer on the Blackfin. */
#define INCOMING_FRAME_SP_OFFSET 0
@@ -1097,7 +1097,7 @@ extern rtx bfin_cc_rtx, bfin_rets_rtx;
#define SET_ASM_OP ".set "
/* DBX register number for a given compiler register number */
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#define SIZE_ASM_OP "\t.size\t"
diff --git a/gcc/config/c6x/c6x.h b/gcc/config/c6x/c6x.h
index d68c7cd183e..3a8b9d6ce37 100644
--- a/gcc/config/c6x/c6x.h
+++ b/gcc/config/c6x/c6x.h
@@ -312,7 +312,7 @@ enum reg_class
/* Before the prologue, the return address is in the B3 register. */
#define RETURN_ADDR_REGNO REG_B3
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_ADDR_REGNO)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (RETURN_ADDR_REGNO)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (RETURN_ADDR_REGNO, Pmode)
#define RETURN_ADDR_RTX(COUNT, FRAME) c6x_return_addr_rtx (COUNT)
@@ -503,7 +503,7 @@ struct GTY(()) machine_function
"B24", "B25", "B26", "B27", "B28", "B29", "B30", "B31", \
"FP", "ARGP", "ILC" }
-#define DBX_REGISTER_NUMBER(N) (dbx_register_map[(N)])
+#define DBX_REGISTER_NUMBER(N, MODE) (dbx_register_map[(N)])
extern unsigned const dbx_register_map[FIRST_PSEUDO_REGISTER];
diff --git a/gcc/config/cr16/cr16.h b/gcc/config/cr16/cr16.h
index bc203df184f..a50916fac39 100644
--- a/gcc/config/cr16/cr16.h
+++ b/gcc/config/cr16/cr16.h
@@ -225,7 +225,7 @@ while (0)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_RA
#define DWARF_FRAME_RETURN_COLUMN \
- DWARF_FRAME_REGNUM (RETURN_ADDRESS_REGNUM)
+ DWARF_FRAME_REGNUM (RETURN_ADDRESS_REGNUM, Pmode)
#define INCOMING_FRAME_SP_OFFSET 0
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h
index b525223e765..b91d1b6d08a 100644
--- a/gcc/config/cris/cris.h
+++ b/gcc/config/cris/cris.h
@@ -562,7 +562,7 @@ enum reg_class
#define INIT_EXPANDERS cris_init_expanders ()
/* FIXME: Move this to right node (it's not documented properly yet). */
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CRIS_SRP_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CRIS_SRP_REGNUM, Pmode)
/* FIXME: Move this to right node (it's not documented properly yet).
FIXME: Check what alignment we can assume regarding
@@ -576,7 +576,7 @@ enum reg_class
need in dwarf2out.c:expand_builtin_init_dwarf_reg_sizes. Right now, I
don't see that we need exact correspondence between DWARF *frame*
registers and DBX_REGISTER_NUMBER, so map them onto GCC registers. */
-#define DWARF_FRAME_REGNUM(REG) (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) (REG)
/* Node: Stack Checking */
/* (no definitions) FIXME: Check. */
@@ -885,7 +885,7 @@ struct cum_args {int regs;};
/* Node: All Debuggers */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
((REGNO) == CRIS_SRP_REGNUM ? CRIS_CANONICAL_SRP_REGNUM : \
(REGNO) == CRIS_MOF_REGNUM ? CRIS_CANONICAL_MOF_REGNUM : \
(REGNO) == CRIS_CC0_REGNUM ? CRIS_CANONICAL_CC0_REGNUM : \
diff --git a/gcc/config/csky/csky.h b/gcc/config/csky/csky.h
index a82f8e5d6d9..5235f13e2fc 100644
--- a/gcc/config/csky/csky.h
+++ b/gcc/config/csky/csky.h
@@ -864,18 +864,18 @@ while (0)
is different from that used in other debug info sections.
Given a GCC hard register number,
this macro should return the .eh_frame register number.*/
-#define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) DBX_REGISTER_NUMBER (REG, MODE)
/* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG,
define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM, Pmode)
/* Use r0 and r1 to pass exception handling information. */
#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM)
/* How to renumber registers for dbx and gdb. */
extern const int csky_dbx_regno[];
-#define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO])
+#define DBX_REGISTER_NUMBER(REGNO, MODE) ((unsigned int) csky_dbx_regno[REGNO])
/******************************************************************
diff --git a/gcc/config/epiphany/epiphany.h b/gcc/config/epiphany/epiphany.h
index fbd093b5214..e5d2282e5d4 100644
--- a/gcc/config/epiphany/epiphany.h
+++ b/gcc/config/epiphany/epiphany.h
@@ -561,7 +561,8 @@ typedef struct GTY (()) machine_function
(count ? NULL_RTX \
: gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), UNSPEC_RETURN_ADDR))
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (EPIPHANY_RETURN_REGNO)
+#define DWARF_FRAME_RETURN_COLUMN \
+ DWARF_FRAME_REGNUM (EPIPHANY_RETURN_REGNO, Pmode)
\f
/* Trampolines.
An epiphany trampoline looks like this:
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index 767fff79f8a..2dc1dfa1173 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -1717,7 +1717,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
instead of inline unwinders and __unwind_function in the non-setjmp case. */
#define DWARF2_UNWIND_INFO 1
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO, Pmode)
\f
/* Assembler Commands for Alignment. */
@@ -1754,7 +1754,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
actual register numbering scheme.
This declaration is required. */
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h
index cb291726e19..f99a677d00f 100644
--- a/gcc/config/gcn/gcn-hsa.h
+++ b/gcc/config/gcn/gcn-hsa.h
@@ -103,4 +103,4 @@ extern const char *last_arg_spec_function (int argc, const char **argv);
#define DWARF2_DEBUGGING_INFO 1
#define DWARF2_ASM_LINE_DEBUG_INFO 1
#define EH_FRAME_THROUGH_COLLECT2 1
-#define DBX_REGISTER_NUMBER(REGNO) gcn_dwarf_register_number (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) gcn_dwarf_register_number (REGNO)
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 1b1ea7d3d8a..87fc6832484 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -80,7 +80,7 @@ along with GCC; see the file COPYING3. If not see
#endif
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] \
: (write_symbols == DWARF2_DEBUG \
? svr4_dbx_register_map[n] : dbx_register_map[n]))
@@ -89,7 +89,7 @@ along with GCC; see the file COPYING3. If not see
target, always use the svr4_dbx_register_map for DWARF .eh_frame
even if we don't use DWARF .debug_frame. */
#undef DWARF_FRAME_REGNUM
-#define DWARF_FRAME_REGNUM(n) \
+#define DWARF_FRAME_REGNUM(n, mode) \
(TARGET_64BIT ? dbx64_register_map[(n)] \
: svr4_dbx_register_map[(n)])
diff --git a/gcc/config/i386/darwin.h b/gcc/config/i386/darwin.h
index fec934aae69..29a32d39af2 100644
--- a/gcc/config/i386/darwin.h
+++ b/gcc/config/i386/darwin.h
@@ -290,7 +290,7 @@ along with GCC; see the file COPYING3. If not see
register numbers for STABS. Fortunately for 64-bit code the
default and the standard are the same. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] \
: write_symbols == DWARF2_DEBUG ? svr4_dbx_register_map[n] \
: dbx_register_map[n])
diff --git a/gcc/config/i386/djgpp.h b/gcc/config/i386/djgpp.h
index 62bfd3a9b00..783c0754245 100644
--- a/gcc/config/i386/djgpp.h
+++ b/gcc/config/i386/djgpp.h
@@ -129,7 +129,7 @@ along with GCC; see the file COPYING3. If not see
#define PTRDIFF_TYPE "int"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) svr4_dbx_register_map[n]
+#define DBX_REGISTER_NUMBER(n, mode) svr4_dbx_register_map[n]
/* Default to pcc-struct-return. */
#define DEFAULT_PCC_STRUCT_RETURN 1
diff --git a/gcc/config/i386/dragonfly.h b/gcc/config/i386/dragonfly.h
index 2f1d3ee14a0..948390e03d8 100644
--- a/gcc/config/i386/dragonfly.h
+++ b/gcc/config/i386/dragonfly.h
@@ -35,7 +35,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define ASM_APP_OFF "#NO_APP\n"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
#undef NO_PROFILE_COUNTERS
diff --git a/gcc/config/i386/freebsd.h b/gcc/config/i386/freebsd.h
index 9d66602142e..8b77c0b3557 100644
--- a/gcc/config/i386/freebsd.h
+++ b/gcc/config/i386/freebsd.h
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_APP_OFF "#NO_APP\n"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
#undef NO_PROFILE_COUNTERS
diff --git a/gcc/config/i386/gnu-user.h b/gcc/config/i386/gnu-user.h
index 6ec5a114270..6e9bbb9486e 100644
--- a/gcc/config/i386/gnu-user.h
+++ b/gcc/config/i386/gnu-user.h
@@ -27,7 +27,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_COMMENT_START "#"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
/* Output assembler code to FILE to call the profiler.
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 993a9fcfdbd..ef0c1292f67 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2155,7 +2155,7 @@ do { \
/* How to renumber registers for dbx and gdb. */
-#define DBX_REGISTER_NUMBER(N) \
+#define DBX_REGISTER_NUMBER(N, MODE) \
(TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])
extern int const dbx_register_map[FIRST_PSEUDO_REGISTER];
diff --git a/gcc/config/i386/i386elf.h b/gcc/config/i386/i386elf.h
index eb2203cf323..9c692e4979b 100644
--- a/gcc/config/i386/i386elf.h
+++ b/gcc/config/i386/i386elf.h
@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see
crtbegin.o%s"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
/* The routine used to output sequences of byte values. We use a special
diff --git a/gcc/config/i386/iamcu.h b/gcc/config/i386/iamcu.h
index 065ee32d19b..346ee92ca9e 100644
--- a/gcc/config/i386/iamcu.h
+++ b/gcc/config/i386/iamcu.h
@@ -34,7 +34,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define ASM_COMMENT_START "#"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
#undef ASM_SPEC
diff --git a/gcc/config/i386/lynx.h b/gcc/config/i386/lynx.h
index 9c6adb53488..00e1a168b95 100644
--- a/gcc/config/i386/lynx.h
+++ b/gcc/config/i386/lynx.h
@@ -38,7 +38,7 @@ along with GCC; see the file COPYING3. If not see
/* LynxOS's GDB counts the floating point registers from 16. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] \
: (n) == 0 ? 0 \
: (n) == 1 ? 2 \
diff --git a/gcc/config/i386/netbsd-elf.h b/gcc/config/i386/netbsd-elf.h
index d7dfe4c88d3..413f7a9c3ec 100644
--- a/gcc/config/i386/netbsd-elf.h
+++ b/gcc/config/i386/netbsd-elf.h
@@ -67,7 +67,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_COMMENT_START "#"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) svr4_dbx_register_map[n]
+#define DBX_REGISTER_NUMBER(n, mode) svr4_dbx_register_map[n]
/* Output assembler code to FILE to call the profiler. */
diff --git a/gcc/config/i386/openbsdelf.h b/gcc/config/i386/openbsdelf.h
index 7771e4c9ddb..2ab8700aed8 100644
--- a/gcc/config/i386/openbsdelf.h
+++ b/gcc/config/i386/openbsdelf.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
while (0)
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
/* This must agree with <machine/_types.h>. */
diff --git a/gcc/config/i386/sysv4.h b/gcc/config/i386/sysv4.h
index 20e29f78c8e..452fcf07c2b 100644
--- a/gcc/config/i386/sysv4.h
+++ b/gcc/config/i386/sysv4.h
@@ -27,7 +27,7 @@ along with GCC; see the file COPYING3. If not see
#define X86_FILE_START_VERSION_DIRECTIVE true
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) svr4_dbx_register_map[n]
+#define DBX_REGISTER_NUMBER(n, mode) svr4_dbx_register_map[n]
/* A C statement (sans semicolon) to output to the stdio stream
FILE the assembler definition of uninitialized global DECL named
diff --git a/gcc/config/i386/vxworks.h b/gcc/config/i386/vxworks.h
index ad9404b40cc..1c798d701d5 100644
--- a/gcc/config/i386/vxworks.h
+++ b/gcc/config/i386/vxworks.h
@@ -32,7 +32,7 @@ along with GCC; see the file COPYING3. If not see
the SVR4 numbering. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
#undef PTRDIFF_TYPE
diff --git a/gcc/config/i386/x86-64.h b/gcc/config/i386/x86-64.h
index 0c5b8af5a13..b901ea6ec32 100644
--- a/gcc/config/i386/x86-64.h
+++ b/gcc/config/i386/x86-64.h
@@ -27,7 +27,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define ASM_COMMENT_START "#"
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(n) \
+#define DBX_REGISTER_NUMBER(n, mode) \
(TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
/* Output assembler code to FILE to call the profiler. */
diff --git a/gcc/config/ia64/sysv4.h b/gcc/config/ia64/sysv4.h
index 108ec9a3476..3d6ac1e8903 100644
--- a/gcc/config/ia64/sysv4.h
+++ b/gcc/config/ia64/sysv4.h
@@ -103,7 +103,7 @@ do { \
#undef FINI_SECTION_ASM_OP
#define FINI_SECTION_ASM_OP "\t.section\t.fini,\"ax\",\"progbits\""
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
ia64_dbx_register_number(REGNO)
#undef SIZE_TYPE
diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h
index 014179f6e81..d47c523a005 100644
--- a/gcc/config/iq2000/iq2000.h
+++ b/gcc/config/iq2000/iq2000.h
@@ -567,7 +567,7 @@ enum delay_type
\f
/* The mapping from gcc register number to DWARF 2 CFA column number. */
-#define DWARF_FRAME_REGNUM(REG) (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) (REG)
/* The DWARF 2 CFA column which tracks the return address. */
#define DWARF_FRAME_RETURN_COLUMN (GP_REG_FIRST + 31)
diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h
index c6ae618e893..3b065dd20be 100644
--- a/gcc/config/lm32/lm32.h
+++ b/gcc/config/lm32/lm32.h
@@ -491,7 +491,7 @@ do { \
/* Debugging. */
/*-------------*/
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#define DEFAULT_GDB_EXTENSIONS 1
diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h
index c4ac5743b94..f84fee5bdc3 100644
--- a/gcc/config/m32c/m32c.h
+++ b/gcc/config/m32c/m32c.h
@@ -451,8 +451,8 @@ enum reg_class
#define STATIC_CHAIN_REGNUM A0_REGNO
#define DWARF_FRAME_REGISTERS 20
-#define DWARF_FRAME_REGNUM(N) m32c_dwarf_frame_regnum (N)
-#define DBX_REGISTER_NUMBER(N) m32c_dwarf_frame_regnum (N)
+#define DWARF_FRAME_REGNUM(N, MODE) m32c_dwarf_frame_regnum (N)
+#define DBX_REGISTER_NUMBER(N, MODE) m32c_dwarf_frame_regnum (N)
#undef ASM_PREFERRED_EH_DATA_FORMAT
/* This is the same as the default in practice, except that by making
diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h
index 0d18e5ae5ac..cee74e3b8e7 100644
--- a/gcc/config/m68k/linux.h
+++ b/gcc/config/m68k/linux.h
@@ -229,7 +229,7 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 06715cd0f22..085be0ebb41 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -707,7 +707,7 @@ __transfer_from_trampoline () \
/* On the Sun-3, the floating point registers have numbers
18 to 25, not 16 to 23 as they do in the compiler. */
-#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
/* Before the prologue, RA is at 0(%sp). */
#define INCOMING_RETURN_ADDR_RTX \
@@ -723,7 +723,7 @@ __transfer_from_trampoline () \
/* We must not use the DBX register numbers for the DWARF 2 CFA column
numbers because that maps to numbers beyond FIRST_PSEUDO_REGISTER.
Instead use the identity mapping. */
-#define DWARF_FRAME_REGNUM(REG) \
+#define DWARF_FRAME_REGNUM(REG, MODE) \
(INT_REGNO_P (REG) || FP_REGNO_P (REG) ? (REG) : INVALID_REGNUM)
/* The return column was originally 24, but gcc used 25 for a while too.
diff --git a/gcc/config/m68k/m68kelf.h b/gcc/config/m68k/m68kelf.h
index f10dd326732..7e18a97e203 100644
--- a/gcc/config/m68k/m68kelf.h
+++ b/gcc/config/m68k/m68kelf.h
@@ -101,7 +101,7 @@ do { \
are 0-7, a0-a8 are 8-15, and fp0-fp7 are 16-23. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#if 0
/* SVR4 m68k assembler is bitching on the `comm i,1,1' which askes for
diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h
index 616b3d483ca..b23d62b658e 100644
--- a/gcc/config/m68k/netbsd-elf.h
+++ b/gcc/config/m68k/netbsd-elf.h
@@ -221,7 +221,7 @@ while (0)
16 to 23 as they do in the compiler. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
/* 1 if N is a possible register number for a function value. For
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
index 5b356c39f67..a4beaaac249 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -164,7 +164,7 @@ extern enum pipeline_type microblaze_pipe;
/* Debug stuff. */
/* How to renumber registers for dbx and gdb. */
-#define DBX_REGISTER_NUMBER(REGNO) microblaze_dbx_regno[(REGNO)]
+#define DBX_REGISTER_NUMBER(REGNO, MODE) microblaze_dbx_regno[(REGNO)]
/* Generate DWARF exception handling info. */
#define DWARF2_UNWIND_INFO 1
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 7ee6d9eae5d..28a61b242ae 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1531,10 +1531,10 @@ FP_ASM_SPEC "\
#define DBX_CONTIN_LENGTH 1500
/* How to renumber registers for dbx and gdb. */
-#define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[REGNO]
+#define DBX_REGISTER_NUMBER(REGNO, MODE) mips_dbx_regno[REGNO]
/* The mapping from gcc register number to DWARF 2 CFA column number. */
-#define DWARF_FRAME_REGNUM(REGNO) mips_dwarf_regno[REGNO]
+#define DWARF_FRAME_REGNUM(REGNO, MODE) mips_dwarf_regno[REGNO]
/* The DWARF 2 CFA column which tracks the return address. */
#define DWARF_FRAME_RETURN_COLUMN RETURN_ADDR_REGNUM
diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h
index 7c90aa38387..1970695f955 100644
--- a/gcc/config/mmix/mmix.h
+++ b/gcc/config/mmix/mmix.h
@@ -458,7 +458,7 @@ enum reg_class
Nowhere except in the code does it say it *has* to be in the range
0..255, or else it will be truncated. That goes for the default too. */
#define DWARF_FRAME_RETURN_COLUMN \
- DWARF_FRAME_REGNUM (MMIX_INCOMING_RETURN_ADDRESS_REGNUM)
+ DWARF_FRAME_REGNUM (MMIX_INCOMING_RETURN_ADDRESS_REGNUM, Pmode)
/* No return address is stored there. */
#define INCOMING_FRAME_SP_OFFSET 0
@@ -757,7 +757,7 @@ typedef struct { int regs; int lib; } CUMULATIVE_ARGS;
/* Node: All Debuggers */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
mmix_dbx_register_number (REGNO)
diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c
index e199bb80f61..2b6db38a222 100644
--- a/gcc/config/msp430/msp430.c
+++ b/gcc/config/msp430/msp430.c
@@ -2661,7 +2661,7 @@ msp430_init_dwarf_reg_sizes_extra (tree address)
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
- unsigned int dnum = DWARF_FRAME_REGNUM (i);
+ unsigned int dnum = DWARF_FRAME_REGNUM (i, VOIDmode);
unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
if (rnum < DWARF_FRAME_REGISTERS)
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 46483d8a087..d9141331d55 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -1323,7 +1323,7 @@ enum reg_class
If this RTL is REG, you should also define
DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM (REGNO). */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LP_REGNUM)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LP_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LP_REGNUM, Pmode)
/* Use $r0 $r1 to pass exception handling information. */
#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? (N) : INVALID_REGNUM)
@@ -1332,7 +1332,7 @@ enum reg_class
This is used to unwind the stack to an exception handler's call frame. */
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2)
-#define DBX_REGISTER_NUMBER(REGNO) nds32_dbx_register_number (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) nds32_dbx_register_number (REGNO)
#define STACK_POINTER_REGNUM SP_REGNUM
diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h
index 65b0ad0f926..cc7e1fd63e0 100644
--- a/gcc/config/nvptx/nvptx.h
+++ b/gcc/config/nvptx/nvptx.h
@@ -260,7 +260,7 @@ struct GTY(()) machine_function
#undef ASM_APP_OFF
#define ASM_APP_OFF "\t// #NO_APP \n"
-#define DBX_REGISTER_NUMBER(N) N
+#define DBX_REGISTER_NUMBER(N, MODE) N
#define TEXT_SECTION_ASM_OP ""
#define DATA_SECTION_ASM_OP ""
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index 936fabadf15..bd4bfdecc73 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -137,7 +137,7 @@
: (X) < 24 ? ((X) - 16) * 2 + 17 \
: ((X) - 24) * 2 + 16)
-#define DBX_REGISTER_NUMBER(X) GCC_TO_HW_REGNO(X)
+#define DBX_REGISTER_NUMBER(X, MODE) GCC_TO_HW_REGNO (X)
#define REGISTER_NAMES { \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 67c02c898f3..437bcac41b9 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -409,7 +409,7 @@ extern rtx hppa_pic_save_rtx (void);
prologue. You only need to define this macro if you want to support
call frame debugging information like that provided by DWARF 2. */
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
-#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
+#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2, Pmode))
/* A C expression whose value is an integer giving a DWARF 2 column
number that may be used as an alternate return column. This should
diff --git a/gcc/config/pa/pa32-regs.h b/gcc/config/pa/pa32-regs.h
index a5e8dfe6475..0e42706fdb4 100644
--- a/gcc/config/pa/pa32-regs.h
+++ b/gcc/config/pa/pa32-regs.h
@@ -235,14 +235,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
Register 88 is mapped to 32. */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
((REGNO) <= 31 ? (REGNO) : \
((REGNO) <= 87 ? (REGNO) + 40 : 32))
/* We must not use the DBX register numbers for the DWARF 2 CFA column
numbers because that maps to numbers beyond FIRST_PSEUDO_REGISTER.
Instead use the identity mapping. */
-#define DWARF_FRAME_REGNUM(REG) REG
+#define DWARF_FRAME_REGNUM(REG, MODE) REG
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
diff --git a/gcc/config/pa/pa64-regs.h b/gcc/config/pa/pa64-regs.h
index 107d703379d..cc9e18936c8 100644
--- a/gcc/config/pa/pa64-regs.h
+++ b/gcc/config/pa/pa64-regs.h
@@ -172,13 +172,13 @@ along with GCC; see the file COPYING3. If not see
Registers 32 - 59 are mapped to 72, 74, 76 ...
Register 60 is mapped to 32. */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
((REGNO) <= 31 ? (REGNO) : ((REGNO) < 60 ? (REGNO - 32) * 2 + 72 : 32))
/* We must not use the DBX register numbers for the DWARF 2 CFA column
numbers because that maps to numbers beyond FIRST_PSEUDO_REGISTER.
Instead use the identity mapping. */
-#define DWARF_FRAME_REGNUM(REG) REG
+#define DWARF_FRAME_REGNUM(REG, MODE) REG
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index a4cd8a0659c..3983b64df8e 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -83,7 +83,7 @@ extern const char *riscv_expand_arch (int argc, const char **argv);
#define DWARF_CIE_DATA_ALIGNMENT -4
/* The mapping from gcc register number to DWARF 2 CFA column number. */
-#define DWARF_FRAME_REGNUM(REGNO) \
+#define DWARF_FRAME_REGNUM(REGNO, MODE) \
(GP_REG_P (REGNO) || FP_REG_P (REGNO) ? REGNO : INVALID_REGNUM)
/* The DWARF 2 CFA column which tracks the return address. */
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d1a11ce8383..9d29a25750b 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -22966,7 +22966,7 @@ rs6000_init_dwarf_reg_sizes_extra (tree address)
for (i = FIRST_ALTIVEC_REGNO; i < LAST_ALTIVEC_REGNO+1; i++)
{
int column = DWARF_REG_TO_UNWIND_COLUMN
- (DWARF2_FRAME_REG_OUT (DWARF_FRAME_REGNUM (i), true));
+ (DWARF2_FRAME_REG_OUT (DWARF_FRAME_REGNUM (i, VOIDmode), true));
HOST_WIDE_INT offset = column * GET_MODE_SIZE (mode);
emit_move_insn (adjust_address (mem, mode, offset), value);
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 6a8f59e63b6..3fe7380279e 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -837,10 +837,10 @@ enum data_align { align_abi, align_opt, align_both };
#define FIRST_PSEUDO_REGISTER 111
/* Use standard DWARF numbering for DWARF debugging information. */
-#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number ((REGNO), 0)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) rs6000_dbx_register_number ((REGNO), 0)
/* Use gcc hard register numbering for eh_frame. */
-#define DWARF_FRAME_REGNUM(REGNO) (REGNO)
+#define DWARF_FRAME_REGNUM(REGNO, MODE) (REGNO)
/* Map register numbers held in the call frame info that gcc has
collected using DWARF_FRAME_REGNUM to those that should be output in
@@ -2215,7 +2215,7 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
mechanism. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNO)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO, Pmode)
/* Describe how we implement __builtin_eh_return. */
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 3 : INVALID_REGNUM)
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index 22e4221f05c..b06c12aab74 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -681,7 +681,7 @@ extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
/* Define the dwarf register mapping.
v16-v31 -> 68-83
rX -> X otherwise */
-#define DBX_REGISTER_NUMBER(regno) \
+#define DBX_REGISTER_NUMBER(regno, mode) \
(((regno) >= 38 && (regno) <= 53) ? (regno) + 30 : (regno))
/* Frame registers. */
diff --git a/gcc/config/sh/elf.h b/gcc/config/sh/elf.h
index 450c0b04730..63d6f04f652 100644
--- a/gcc/config/sh/elf.h
+++ b/gcc/config/sh/elf.h
@@ -61,7 +61,7 @@ along with GCC; see the file COPYING3. If not see
#define LINK_EMUL_PREFIX "sh%{ml:l}elf"
#endif
-#define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) SH_DBX_REGISTER_NUMBER (REGNO)
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h
index c1d0441d488..9536b377eab 100644
--- a/gcc/config/sh/linux.h
+++ b/gcc/config/sh/linux.h
@@ -114,7 +114,7 @@ along with GCC; see the file COPYING3. If not see
this slot must be set. To do this, we redefine DBX_REGISTER_NUMBER
so as to return itself for 16. */
#undef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
(((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO))
/* Install the __sync libcalls. */
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 4c7ca5091fc..ca71dd088b0 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1659,7 +1659,7 @@ extern bool current_function_interrupt;
to match gdb. */
/* expand_builtin_init_dwarf_reg_sizes uses this to test if a
register exists, so we should return -1 for invalid register numbers. */
-#define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) SH_DBX_REGISTER_NUMBER (REGNO)
#define SH_DBX_REGISTER_NUMBER(REGNO) \
(IN_RANGE ((REGNO), \
@@ -1820,7 +1820,7 @@ extern tree *sh_deferred_function_attributes_tail;
#define EPILOGUE_USES(REGNO) (TARGET_FPU_ANY && REGNO == FPSCR_REG)
-#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (PR_REG))
+#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (PR_REG, VOIDmode))
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 4U : INVALID_REGNUM)
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 78bb1dd9895..4c4c4083889 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1251,7 +1251,7 @@ do { \
plus_constant (word_mode, \
gen_rtx_REG (word_mode, INCOMING_RETURN_ADDR_REGNUM), 8)
#define DWARF_FRAME_RETURN_COLUMN \
- DWARF_FRAME_REGNUM (INCOMING_RETURN_ADDR_REGNUM)
+ DWARF_FRAME_REGNUM (INCOMING_RETURN_ADDR_REGNUM, Pmode)
/* The offset from the incoming value of %sp to the top of the stack frame
for the current function. On sparc64, we have to account for the stack
diff --git a/gcc/config/tilegx/tilegx.h b/gcc/config/tilegx/tilegx.h
index 13fe782ea54..07e7674cb35 100644
--- a/gcc/config/tilegx/tilegx.h
+++ b/gcc/config/tilegx/tilegx.h
@@ -299,7 +299,7 @@ enum reg_class
#define RETURN_ADDR_RTX tilegx_return_addr
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEGX_LINK_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEGX_LINK_REGNUM, Pmode)
#define DWARF_ZERO_REG 63
diff --git a/gcc/config/tilepro/tilepro.h b/gcc/config/tilepro/tilepro.h
index f595cf322cb..40bad3e6e60 100644
--- a/gcc/config/tilepro/tilepro.h
+++ b/gcc/config/tilepro/tilepro.h
@@ -262,7 +262,7 @@ enum reg_class
#define RETURN_ADDR_RTX tilepro_return_addr
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEPRO_LINK_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEPRO_LINK_REGNUM, Pmode)
#define DWARF_ZERO_REG 63
diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h
index ca96515fea8..78f2a326528 100644
--- a/gcc/config/v850/v850.h
+++ b/gcc/config/v850/v850.h
@@ -704,7 +704,8 @@ typedef enum
#define DWARF2_FRAME_INFO 1
#define DWARF2_UNWIND_INFO 0
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN \
+ DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM, Pmode)
#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
diff --git a/gcc/config/visium/elf.h b/gcc/config/visium/elf.h
index e3b08789358..3ff401e3501 100644
--- a/gcc/config/visium/elf.h
+++ b/gcc/config/visium/elf.h
@@ -21,5 +21,5 @@
/* Turn on DWARF-2 frame unwinding. */
#define INCOMING_FRAME_SP_OFFSET 0
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_REGNUM)
-#define DWARF_FRAME_REGNUM(REGNO) (REGNO)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGNUM)
+#define DWARF_FRAME_REGNUM(REGNO, MODE) (REGNO)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGNUM, Pmode)
diff --git a/gcc/config/visium/visium.h b/gcc/config/visium/visium.h
index 10edef5891f..3e3e8a67d18 100644
--- a/gcc/config/visium/visium.h
+++ b/gcc/config/visium/visium.h
@@ -1491,7 +1491,7 @@ do \
This describes how to specify debugging information.
mda is known to GDB, but not to GCC. */
-#define DBX_REGISTER_NUMBER(REGNO) \
+#define DBX_REGISTER_NUMBER(REGNO, MODE) \
((REGNO) > MDB_REGNUM ? (REGNO) + 1 : (REGNO))
/* `DEBUGGER_AUTO_OFFSET (X)'
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index da6c97d92e2..63f161e0c6d 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -211,7 +211,7 @@ along with GCC; see the file COPYING3. If not see
#define FIRST_PSEUDO_REGISTER 36
/* Return the stabs register number to use for REGNO. */
-#define DBX_REGISTER_NUMBER(REGNO) xtensa_dbx_register_number (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) xtensa_dbx_register_number (REGNO)
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator. */
@@ -773,7 +773,7 @@ typedef struct xtensa_args
still be specified in DWARF so that DW_AT_frame_base is set correctly
for debugging. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 0)
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (0)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (0, Pmode)
#define DWARF_ALT_FRAME_RETURN_COLUMN 16
#define DWARF_FRAME_REGISTERS (DWARF_ALT_FRAME_RETURN_COLUMN \
+ (TARGET_WINDOWED_ABI ? 0 : 1))
diff --git a/gcc/dbxout.c b/gcc/dbxout.c
index 5a20fdecdcc..c3f4a874db1 100644
--- a/gcc/dbxout.c
+++ b/gcc/dbxout.c
@@ -2993,6 +2993,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home)
rtx addr = 0;
int number = 0;
int regno = -1;
+ machine_mode regmode ATTRIBUTE_UNUSED;
/* Don't mention a variable at all
if it was completely optimized into nothingness.
@@ -3016,6 +3017,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home)
if (REG_P (home))
{
regno = REGNO (home);
+ regmode = GET_MODE (home);
if (regno >= FIRST_PSEUDO_REGISTER)
return 0;
}
@@ -3120,7 +3122,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home)
{
letter = 'r';
code = N_RSYM;
- number = DBX_REGISTER_NUMBER (regno);
+ number = DBX_REGISTER_NUMBER (regno, regmode);
}
else if (MEM_P (home)
&& (MEM_P (XEXP (home, 0))
@@ -3144,7 +3146,9 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home)
code = N_RSYM;
if (REGNO (XEXP (home, 0)) >= FIRST_PSEUDO_REGISTER)
return 0;
- number = DBX_REGISTER_NUMBER (REGNO (XEXP (home, 0)));
+
+ regmode = GET_MODE (XEXP (home, 0));
+ number = DBX_REGISTER_NUMBER (REGNO (XEXP (home, 0)), regmode);
}
else
{
@@ -3539,7 +3543,7 @@ dbxout_parms (tree parms)
else
best_rtl = DECL_INCOMING_RTL (parms);
- number = DBX_REGISTER_NUMBER (REGNO (best_rtl));
+ number = DBX_REGISTER_NUMBER (REGNO (best_rtl), GET_MODE (best_rtl));
}
else if (MEM_P (DECL_RTL (parms))
&& REG_P (XEXP (DECL_RTL (parms), 0))
diff --git a/gcc/defaults.h b/gcc/defaults.h
index 205a982dec9..7b95d1c83b2 100644
--- a/gcc/defaults.h
+++ b/gcc/defaults.h
@@ -413,7 +413,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
registers. */
#ifndef DWARF_FRAME_RETURN_COLUMN
#ifdef PC_REGNUM
-#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (PC_REGNUM)
+#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (PC_REGNUM, Pmode)
#else
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGISTERS
#endif
@@ -423,13 +423,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
no renumbering is necessary. */
#ifndef DBX_REGISTER_NUMBER
-#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
+#define DBX_REGISTER_NUMBER(REGNO, MODE) (REGNO)
#endif
/* The mapping from gcc register number to DWARF 2 CFA column number.
By default, we just provide columns for all registers. */
#ifndef DWARF_FRAME_REGNUM
-#define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
+#define DWARF_FRAME_REGNUM(REG, MODE) DBX_REGISTER_NUMBER (REG, MODE)
#endif
/* The mapping from dwarf CFA reg number to internal dwarf reg numbers. */
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2023-06-28 13:32 [gcc(refs/vendors/ARM/heads/morello)] Fixes for DBX_REGISTER_NUMBER and DWARF_FRAME_REGNUM Alex Coplan
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