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* [gcc r11-10883] Refine maskloadmn pattern with UNSPEC_MASKLOAD.
@ 2023-06-29 1:27 hongtao Liu
0 siblings, 0 replies; only message in thread
From: hongtao Liu @ 2023-06-29 1:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f59565f5dc2cdb5ac5a0b2b75404a36771232f86
commit r11-10883-gf59565f5dc2cdb5ac5a0b2b75404a36771232f86
Author: liuhongt <hongtao.liu@intel.com>
Date: Tue Jun 20 15:41:00 2023 +0800
Refine maskloadmn pattern with UNSPEC_MASKLOAD.
If mem_addr points to a memory region with less than whole vector size
bytes of accessible memory and k is a mask that would prevent reading
the inaccessible bytes from mem_addr, add UNSPEC_MASKLOAD to prevent
it to be transformed to vpblendd.
gcc/ChangeLog:
PR target/110309
* config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
Refine pattern with UNSPEC_MASKLOAD.
(maskload<mode><avx512fmaskmodelower>): Ditto.
Diff:
---
gcc/config/i386/sse.md | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 95619944c87..a7e5f6dad4d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -21857,7 +21857,9 @@
(define_expand "maskload<mode><avx512fmaskmodelower>"
[(set (match_operand:V48_AVX512VL 0 "register_operand")
(vec_merge:V48_AVX512VL
- (match_operand:V48_AVX512VL 1 "memory_operand")
+ (unspec:V48_AVX512VL
+ [(match_operand:V48_AVX512VL 1 "memory_operand")]
+ UNSPEC_MASKLOAD)
(match_dup 0)
(match_operand:<avx512fmaskmode> 2 "register_operand")))]
"TARGET_AVX512F")
@@ -21865,7 +21867,9 @@
(define_expand "maskload<mode><avx512fmaskmodelower>"
[(set (match_operand:VI12_AVX512VL 0 "register_operand")
(vec_merge:VI12_AVX512VL
- (match_operand:VI12_AVX512VL 1 "memory_operand")
+ (unspec:VI12_AVX512VL
+ [(match_operand:VI12_AVX512VL 1 "memory_operand")]
+ UNSPEC_MASKLOAD)
(match_dup 0)
(match_operand:<avx512fmaskmode> 2 "register_operand")))]
"TARGET_AVX512BW")
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