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* [gcc/devel/vineetg/optim-double-const-m0] RISC-V: add comment for TARGET_CANNOT_FORCE_CONST_MEM
@ 2023-07-28 0:34 Vineet Gupta
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From: Vineet Gupta @ 2023-07-28 0:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:4146f7bbf3e3f0b6f8be3d911e577462311a21ec
commit 4146f7bbf3e3f0b6f8be3d911e577462311a21ec
Author: Vineet Gupta <vineetg@rivosinc.com>
Date: Thu Jul 27 16:43:29 2023 -0700
RISC-V: add comment for TARGET_CANNOT_FORCE_CONST_MEM
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
Diff:
---
gcc/config/riscv/riscv.cc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 38d8eb2fcf5..6e5d2feb103 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -826,7 +826,9 @@ riscv_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
return riscv_const_insns (x) > 0;
}
-/* Implement TARGET_CANNOT_FORCE_CONST_MEM. */
+/* Implement TARGET_CANNOT_FORCE_CONST_MEM.
+ Return true if X cannot (or should not) be spilled to the
+ constant pool. */
static bool
riscv_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
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