[gcc r13-7814] Daily bump.

[gcc r13-7814] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:a242fb41965c2b2f83aba62f439e5f0942b1b02b

commit r13-7814-ga242fb41965c2b2f83aba62f439e5f0942b1b02b
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Wed Sep 13 00:25:38 2023 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 162 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/m2/ChangeLog        |  76 +++++++++++++++++++++++
 gcc/testsuite/ChangeLog |  45 ++++++++++++++
 4 files changed, 284 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbdf0266e7e0..c58959628d3f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,165 @@
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
+	New function.
+	(aarch64_layout_frame): Use it to decide whether locals should
+	go above or below the saved registers.
+	(aarch64_expand_prologue): Update stack layout comment.
+	Emit a stack tie after the final adjustment.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
+	(aarch64_frame::below_hard_fp_saved_regs_size): Delete.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
+	(aarch64_frame::hard_fp_save_and_probe): New fields.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
+	Rather than asserting that a leaf function saves LR, instead assert
+	that a leaf function saves something.
+	(aarch64_get_separate_components): Prevent the chosen probe
+	registers from being individually shrink-wrapped.
+	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+	probe registers that aren't at the bottom of the previous allocation.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+	Always probe the residual allocation at offset 1024, asserting
+	that that is in range.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
+	the LR save slot is in the first 16 bytes of the register save area.
+	Only form STP/LDP push/pop candidates if both registers are valid.
+	(aarch64_allocate_and_probe_stack_space): Remove workaround for
+	when LR was not in the first 16 bytes.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+	Don't probe final allocations that are exactly 1KiB in size (after
+	unprobed space above the final allocation has been deducted).
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
+	calculation of initial_adjust for frames in which all saves
+	are SVE saves.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
+	the allocation of the top of the frame.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame): Add comment above
+	reg_offset.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
+	from the bottom of the frame, rather than the bottom of the saved
+	register area.  Measure reg_offset from the bottom of the frame
+	rather than the bottom of the saved register area.
+	(aarch64_save_callee_saves): Update accordingly.
+	(aarch64_restore_callee_saves): Likewise.
+	(aarch64_get_separate_components): Likewise.
+	(aarch64_process_components): Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
+	to...
+	(aarch64_frame::bytes_above_hard_fp): ...this.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+	(aarch64_expand_prologue): Update accordingly.
+	(aarch64_initial_elimination_offset): Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
+	(aarch64_frame::bytes_above_locals): ...this.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame)
+	(aarch64_initial_elimination_offset): Update accordingly.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
+	calculation of chain_offset into the emit_frame_chain block.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
+	callee_offset handling.
+	(aarch64_save_callee_saves): Replace the start_offset parameter
+	with a bytes_below_sp parameter.
+	(aarch64_restore_callee_saves): Likewise.
+	(aarch64_expand_prologue): Update accordingly.
+	(aarch64_expand_epilogue): Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
+	field.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
+	(aarch64_expand_epilogue): Use it instead of
+	below_hard_fp_saved_regs_size.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
+	field.
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
+	and use it instead of crtl->outgoing_args_size.
+	(aarch64_get_separate_components): Use bytes_below_saved_regs instead
+	of outgoing_args_size.
+	(aarch64_process_components): Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
+	allocate the frame in one go if there are no saved registers.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
+	chain_offset rather than callee_offset.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
+	a local shorthand for cfun->machine->frame.
+	(aarch64_restore_callee_saves, aarch64_get_separate_components):
+	(aarch64_process_components): Likewise.
+	(aarch64_allocate_and_probe_stack_space): Likewise.
+	(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
+	(aarch64_layout_frame): Use existing shorthand for one more case.
+
+2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	Backported from master:
+	2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	* doc/gm2.texi (Compiler options): Document new option
+	-Wcase-enum.
+
+2023-09-12  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	Backported from master:
+	2023-08-31  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/96762
+	* config/rs6000/rs6000-string.cc (expand_block_move): Call vector
+	load/store with length only on 64-bit Power10.
+
 2023-09-11  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/111340
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 9cb5371202ac..d2e767b9b866 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230912
+20230913
diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog
index b53ad3276921..d3292d92c3a3 100644
--- a/gcc/m2/ChangeLog
+++ b/gcc/m2/ChangeLog
@@ -1,3 +1,79 @@
+2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	Backported from master:
+	2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	* gm2-compiler/M2CaseList.def (PushCase): Rename parameters
+	r to rec and v to va.  Add expr parameter.
+	(MissingCaseStatementBounds): New procedure function.
+	* gm2-compiler/M2CaseList.mod (RangePair): Add expression.
+	(PushCase): Rename parameters r to rec and v to va.  Add
+	expr parameter.
+	(RemoveRange): New procedure function.
+	(SubBitRange): Detect the case when the range in the set matches
+	lo..hi.
+	(CheckLowHigh): New procedure.
+	(ExcludeCaseRanges): Rename parameter c to cd.  Rename local
+	variables q to cl and r to rp.
+	(High): Remove.
+	(Low): Remove.
+	(DoEnumValues): Remove.
+	(IncludeElement): New procedure.
+	(IncludeElements): New procedure.
+	(ErrorRangeEnum): New procedure.
+	(ErrorRange): Remove.
+	(ErrorRanges): Remove.
+	(appendEnum): New procedure.
+	(appendStr): New procedure.
+	(EnumerateErrors): New procedure.
+	(MissingCaseBounds): Re-implement.
+	(InRangeList): Remove.
+	(MissingCaseStatementBounds): New procedure function.
+	(checkTypes): Re-format.
+	(inRange): Re-format.
+	(TypeCaseBounds): Re-format.
+	* gm2-compiler/M2Error.mod (GetAnnounceScope): Add noscope to
+	case label list.
+	* gm2-compiler/M2GCCDeclare.mod: Replace ForeachFieldEnumerationDo
+	with ForeachLocalSymDo.
+	* gm2-compiler/M2Options.def (SetCaseEnumChecking): New procedure.
+	(CaseEnumChecking): New variable.
+	* gm2-compiler/M2Options.mod (SetCaseEnumChecking): New procedure.
+	(Module initialization): set CaseEnumChecking to FALSE.
+	* gm2-compiler/M2Quads.def (QuadOperator): Alphabetically ordered.
+	* gm2-compiler/M2Quads.mod (IsBackReferenceConditional): Add else
+	clause.
+	(BuildCaseStart): Pass selector expression to InitCaseBounds.
+	(CheckUninitializedVariablesAreUsed): Remove.
+	(IsInlineWithinBlock): Remove.
+	(AsmStatementsInBlock): Remove.
+	(CheckVariablesInBlock): Remove commented code.
+	(BeginVarient): Pass NulSym to InitCaseBounds.
+	* gm2-compiler/M2Range.mod (FoldCaseBounds): New local variable
+	errorGenerated.  Add call to MissingCaseStatementBounds.
+	* gm2-compiler/P3Build.bnf (CaseEndStatement): Call ElseCase.
+	* gm2-compiler/PCSymBuild.mod (InitDesExpr): Add else clause.
+	(InitFunction): Add else clause.
+	(InitConvert): Add else clause.
+	(InitLeaf): Add else clause.
+	(InitBinary): Add else clause.
+	(InitUnary): Add else clause.
+	* gm2-compiler/SymbolTable.def (GetNth): Re-write comment.
+	(ForeachFieldEnumerationDo): Re-write comment stating alphabetical
+	traversal.
+	* gm2-compiler/SymbolTable.mod (GetNth): Re-write comment.
+	Add case label for EnumerationSym and call GetItemFromList.
+	(ForeachFieldEnumerationDo): Re-write comment stating alphabetical
+	traversal.
+	(SymEnumeration): Add ListOfFields used for declaration order.
+	(MakeEnumeration): Initialize ListOfFields.
+	(PutFieldEnumeration): Include Field in ListOfFields.
+	* gm2-gcc/m2options.h (M2Options_SetCaseEnumChecking): New
+	function.
+	* gm2-lang.cc (gm2_langhook_handle_option): Add
+	OPT_Wcase_enum case and call M2Options_SetCaseEnumChecking.
+	* lang.opt (Wcase-enum): Add.
+
 2023-09-11  Gaius Mulley  <gaiusmod2@gmail.com>
 
 	PR modula2/111330
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b76fc8c16c36..785cc032520a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,48 @@
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/stack-protector-8.c: New test.
+	* gcc.target/aarch64/stack-protector-9.c: Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe
+	to be at offset 1024 rather than offset 0.
+	* gcc.target/aarch64/stack-check-prologue-18.c: Likewise.
+	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/stack-check-prologue-18.c: New test.
+	* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
+	* gcc.target/aarch64/stack-check-prologue-20.c: Likewise.
+
+2023-09-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/stack-check-prologue-17.c: New test.
+
+2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	Backported from master:
+	2023-09-12  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	* gm2/switches/case/fail/missingclause.mod: New test.
+	* gm2/switches/case/fail/switches-case-fail.exp: New test.
+	* gm2/switches/case/pass/enumcase.mod: New test.
+	* gm2/switches/case/pass/enumcase2.mod: New test.
+	* gm2/switches/case/pass/switches-case-pass.exp: New test.
+
+2023-09-12  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	Backported from master:
+	2023-08-31  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	PR target/96762
+	* gcc.target/powerpc/pr96762.c: New.
+
 2023-09-11  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/111340